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Running a Schematic Validation Check

You can keep working with your project or open it from the Workspace and continue from where the previous step is completed.

The final step in working with the schematic is its validation. Validation of the schematic is in most cases a background process that runs parallel to the creation of the schematic. It can also be run manually with the Project » Validate Project command. During this process, duplication of components is checked, as well as net connectivity, correct use of various circuit objects, and more. Learn more about project validation here.

All violations are underlined with a red wavy line, and a list of these violations is displayed in the Messages panel. If there are errors, this panel opens automatically, for example, when performing automatic numbering and other processes.

Fig.16 - Messages panel

To quickly localize a violation, just double-click on it, and it automatically appears in the design space.

Note: It is recommended to fix Error first, and then Warning, since Warning may be a consequence of having Error on the schematic.

If you want to exclude a specific violation from verification, use the special No ERC directive (Place » Directives » Generic No ERC) that we apply to the object, thereby excluding it from verification.

Check and fix all violations you may have made while creating the schematic. Remember to save your changes locally and to the Workspace.

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