News & Updates

Stubs are an important topic in high-speed PCB design, and there is a longstanding guideline that stubs should always be removed from all vias on high-speed digital interconnects. While stubs are bad for high-speed lines, they do not always need to be removed. What is more important is to predict the loss profile and frequencies, and to floorplan appropriately to try and prevent such losses.

Once you finish your placement and routing in your PCB layout, it can be tempting to wrap up the layout and send everything in directly to manufacturing. The reality is that the board may still need some work before it is considered finished. The cleanup you perform at the final stage of PCB layout will help you catch any outstanding errors that can't be programmed into your DRC engine, and it gives you a chance to add any outstanding details to the surface layers.

In this project we’ll be building a moderate sized LED panel on insulated metal substrate (IMS). This light panel has three different white balance High CRI LED types on it, warm, neutral and cool. By changing the brightness of the different white balances, the light from the panel can be adjusted to match other lighting, making it perfect for film use - but also creating perfect lighting for electronics work. As with all my projects, this LED panel is open source, you can find the Altium project files over on my GitHub released under the permissive MIT License.

Every design should begin with selecting the materials that will appear in the PCB stackup, as well as arranging layers in the stackup to support layout and routing. This section of our PCB manufacturing andc DFM crash course focuses on selecting the right materials for your PCB design. Materials should be selected given the particular design requirements outlined in your specifications.

FPGAs come in quad or BGA packages that can be difficult to floorplan, especially with the high number of I/Os often implemented in these components. FPGAs offer a lot of advantages in terms of their reconfigurability, but they can require a lot of effort to layout and route without headaches. If you’ve never worked with an FPGA in your PCB layout, we have some guidelines that can help you get started.

S-parameters are fundamental quantities in signal integrity, and an ability to understand them from measurement or analysis is very important. If you have a 3-port network, like a power divider or circulator, it may appear that you must use a 3-port VNA to measure these S-parameters. It is always acceptable to measure between two ports, but you need to know what exactly it is you are measuring. In this article, we’ll look at the relationship between the true 3-port S-parameters with a 2-port measurement.

Before implementing design for manufacturing, it is important to understand the underlying process behind producing a physical PCB. Regardless of the various technologies present in each facility, a large majority of industry-leading manufacturers follow a specific set of steps to turn your design from a drawing in a CAD application into a physical board. In this article, we'll cover the basics that designers need to know as part of our crash course series on PCB manufacturing.

If you compile a list of skew sources, you'll see that fiber weave-induced skew is only one entry on a long list of skew sources. We'll look at this list of possible skew sources below, and we'll see how they affect the operation of your PCB. From the list below, we'll see that some of these issues with skew are not simply solved by paying attention to the fiber weave construction in a PCB substrate.

We love answering questions from our readers and YouTube viewers, and one of the recent questions we received relates to EMI from switching elements in a switching regulator is "Should a cutout be placed below the inductor in a switching regulator circuit?". Despite the variations in inductors and their magnetic behavior, there are some general principles that can be used to judge the effects of placing ground near inductors in switching regulator circuits. We’ll look at some of these principles in this article

We are happy to announce that the Altium Designer 22.6 update is now available. Altium Designer 22.6 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!

Find 9 mistakes in a PCB design and get added into the lucky draw to win a prize from Altium!

This Semi-Additive Process is an additional tool in the PCB fabricators' toolbox that enables them to provide feature sizes for trace width and spacing that are 25 microns, (1 mil) and below depending on the fabricators' imaging equipment. This provides much more flexibility to breakout out tight BGA areas and the ability to shrink overall circuit size and/ or reduce the number of circuit layers in the design. As the PCB design community embraces the benefits of this new printed circuit board fabrication technique, there are of course many questions to be answered.

It’s no secret that component shortages have become more frequent this year. In fact, countries around the world are losing billions in revenue due to supply issues. Having the right components on hand is more crucial than ever as availability, obsolescence, counterfeit products and environmental non-compliance risks continue to grow. Fortunately, many shortages can be avoided by introducing proactive supply chain practices.

Do length-tuning structures create an impedance discontinuity? The answer is an unequivocal “yes”, but it might not matter in your design depending on several factors. Applying a length-tuning structure is equivalent to changing the distance between the traces while meandering. Therefore, you will have a change in the odd-mode impedance of a single trace. The question then becomes: does this deviation in trace impedance in a length tuning structure matter?

The continued miniaturization of both packaging and component size in next-generation electronics is becoming harder and harder to work around and presents a significant challenge for both PCB designers and PCB fabricators. To effectively navigate the constraints of the traditional subtractive-etch PCB fabrication processes, PCB designs require advanced PCB fabrication capabilities while pushing the limits of finer feature size, higher layer counts, multiple levels of stacked micro vias and increased lamination cycles.

Take a look at the inside of some integrated circuit packages, and you’ll find a number of wires bonded to the semiconductor die and the pads at the edge of the component's package. As a signal traverses makes its way along an interconnect and into a destination circuit, signals need to travel across these bond wires and pads before they are interpreted as a logic state. As you look around the edge of an IC, these bond wires can have different lengths, and they incur different levels of delay and contribute to total jitter.