News & Updates

In this article, we’ll discuss the key design features to implement, and steps to take prior to fabrication that will help prevent some common DFM problems. I’ll also provide examples of where I commonly see these PCB DFM problems in signal integrity circuits.

If you’re working with a high-speed digital component, there are some simple power integrity rules that should be followed. However, there is one quantity that is sometimes ignored when building a PDN impedance simulation: the spreading inductance of your plane pair. Here are some points designers should know about the spreading inductance of a plane pair.

In this article, I’ll present some design basics that every new designer should follow to help ensure their design process is successful. Some of these points may challenge the conventional view of how circuit boards are constructed, but they are intended to help balance low noise signaling, manufacturability, and ease of solving a layout.

High voltage PCBs are subject to certain safety and reliability concerns that you won’t find in most other boards. If your fabrication house specializes in high voltage PCBs and keeps materials in stock, they can likely recommend a material set, as well as a standard stackup you might use for certain voltage ranges and frequencies. If you need to choose your own materials, follow the tips below to help you narrow down to the right material set.

There are some guidelines I see many designers implement as a standard practice, often without thinking about it. Some of these practices are misunderstood or implemented without best practices. Others are implemented without thinking about the potential problems. One of these is the use of tented vias, which is sometimes implemented in a PCB layout by default. Is this always the right practice?

The idea of a purely capacitive load is something of a fallacy. Yes, capacitors exist, but all capacitors are non-ideal, and it is this deviation from a theoretical capacitance that determines how to impedance match a load that exhibits capacitive behavior. Let’s take a look at this important aspect of interconnect design and see what it really means to terminate a capacitive load.

There are all sorts of version control systems out there that people have been using with their PCB design software. As discussed in Why Use a Version Control System, we looked at different options ranging for local hard drive storage to sophisticated online revisioning systems. In this article we will be reviewing the differences between a standard VCS and Altium 365.

Version Control Systems (VCS) have been around for many decades within the software world but can be surprisingly new to some folks in the electronics design industry. This article will cover what a VCS is, what it does, and why you should be using one for your PCB design projects.

Designers often conflate leftover annular ring and pad sizes - they need to place a sufficiently large pad size on the surface layer to ensure that the annular ring that is leftover during fabrication will be large enough. As long as the annular ring is sufficiently large, the drill hit will not be considered defective and the board will have passed inspection. In this article, I'll discuss the limits on IPC-6012 Class 3 annular rings as these are a standard fabrication requirement for high-reliability rigid PCBs.