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In this article, we’ll discuss the key design features to implement, and steps to take prior to fabrication that will help prevent some common DFM problems. I’ll also provide examples of where I commonly see these PCB DFM problems in signal integrity circuits.
If you’re working with a high-speed digital component, there are some simple power integrity rules that should be followed. However, there is one quantity that is sometimes ignored when building a PDN impedance simulation: the spreading inductance of your plane pair. Here are some points designers should know about the spreading inductance of a plane pair.
In this article, I’ll present some design basics that every new designer should follow to help ensure their design process is successful. Some of these points may challenge the conventional view of how circuit boards are constructed, but they are intended to help balance low noise signaling, manufacturability, and ease of solving a layout.
The primary goal of your traces is to carry signals throughout your board without losses. To do this properly, you must familiarize yourself with the requirements for signals on the printed circuit board and how to optimize the topology of the board in terms of signal integrity. We will analyze the most popular routing cases applicable for using the Gloss and Retrace tools in Altium Designer to optimize your signal integrity.
High voltage PCBs are subject to certain safety and reliability concerns that you won’t find in most other boards. If your fabrication house specializes in high voltage PCBs and keeps materials in stock, they can likely recommend a material set, as well as a standard stackup you might use for certain voltage ranges and frequencies. If you need to choose your own materials, follow the tips below to help you narrow down to the right material set.
There are some guidelines I see many designers implement as a standard practice, often without thinking about it. Some of these practices are misunderstood or implemented without best practices. Others are implemented without thinking about the potential problems. One of these is the use of tented vias, which is sometimes implemented in a PCB layout by default. Is this always the right practice?
The idea of a purely capacitive load is something of a fallacy. Yes, capacitors exist, but all capacitors are non-ideal, and it is this deviation from a theoretical capacitance that determines how to impedance match a load that exhibits capacitive behavior. Let’s take a look at this important aspect of interconnect design and see what it really means to terminate a capacitive load.
There are all sorts of version control systems out there that people have been using with their PCB design software. As discussed in Why Use a Version Control System, we looked at different options ranging for local hard drive storage to sophisticated online revisioning systems. In this article we will be reviewing the differences between a standard VCS and Altium 365.
Version Control Systems (VCS) have been around for many decades within the software world but can be surprisingly new to some folks in the electronics design industry. This article will cover what a VCS is, what it does, and why you should be using one for your PCB design projects.
Designers often conflate leftover annular ring and pad sizes - they need to place a sufficiently large pad size on the surface layer to ensure that the annular ring that is leftover during fabrication will be large enough. As long as the annular ring is sufficiently large, the drill hit will not be considered defective and the board will have passed inspection. In this article, I'll discuss the limits on IPC-6012 Class 3 annular rings as these are a standard fabrication requirement for high-reliability rigid PCBs.
High-reliability electronics must go through multiple rounds of testing and qualification to ensure they can withstand their intended operating environment. Designing to performance standards, whether the baseline IPC standards or more stringent industry standards, is the first step in ensuring a reliable circuit board. In this e-book, readers will gain a thorough look into PCB testing and analysis, starting from basic tests performed on bare boards and completed assemblies.
Coupling capacitors find plenty of uses in analog applications and on differential protocols, acting essentially as high pass filters that remove DC bias carried seen on a signal. In the case of PCIe, there are a few reasons to place AC coupling capacitors on differential pairs beyond the fact that AC coupling capacitors are listed in the standard. In this article, we’ll look briefly at where to place coupling capacitors on PCIe links, as well as the reasons these are placed on PCIe links.
We are happy to announce that the Altium Designer 22.7 update is now available. Altium Designer 22.7 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
Design to cost is a lofty idea that is only perfectly executed when supply and demand for components are in perfect harmony. Unfortunately, the current landscape for component sourcing makes design to cost more of a balancing act rather than an exercise in price reduction. To help designers in their efforts to balance cost, capabilities, and procurement, we created this ebook to help users understand how modern supply chain tools can help in these complex design problems.
Stubs are an important topic in high-speed PCB design, and there is a longstanding guideline that stubs should always be removed from all vias on high-speed digital interconnects. While stubs are bad for high-speed lines, they do not always need to be removed. What is more important is to predict the loss profile and frequencies, and to floorplan appropriately to try and prevent such losses.
Once you finish your placement and routing in your PCB layout, it can be tempting to wrap up the layout and send everything in directly to manufacturing. The reality is that the board may still need some work before it is considered finished. The cleanup you perform at the final stage of PCB layout will help you catch any outstanding errors that can't be programmed into your DRC engine, and it gives you a chance to add any outstanding details to the surface layers.
In this project we’ll be building a moderate sized LED panel on insulated metal substrate (IMS). This light panel has three different white balance High CRI LED types on it, warm, neutral and cool. By changing the brightness of the different white balances, the light from the panel can be adjusted to match other lighting, making it perfect for film use - but also creating perfect lighting for electronics work. As with all my projects, this LED panel is open source, you can find the Altium project files over on my GitHub released under the permissive MIT License.
Every design should begin with selecting the materials that will appear in the PCB stackup, as well as arranging layers in the stackup to support layout and routing. This section of our PCB manufacturing andc DFM crash course focuses on selecting the right materials for your PCB design. Materials should be selected given the particular design requirements outlined in your specifications.
FPGAs come in quad or BGA packages that can be difficult to floorplan, especially with the high number of I/Os often implemented in these components. FPGAs offer a lot of advantages in terms of their reconfigurability, but they can require a lot of effort to layout and route without headaches. If you’ve never worked with an FPGA in your PCB layout, we have some guidelines that can help you get started.
S-parameters are fundamental quantities in signal integrity, and an ability to understand them from measurement or analysis is very important. If you have a 3-port network, like a power divider or circulator, it may appear that you must use a 3-port VNA to measure these S-parameters. It is always acceptable to measure between two ports, but you need to know what exactly it is you are measuring. In this article, we’ll look at the relationship between the true 3-port S-parameters with a 2-port measurement.
Before implementing design for manufacturing, it is important to understand the underlying process behind producing a physical PCB. Regardless of the various technologies present in each facility, a large majority of industry-leading manufacturers follow a specific set of steps to turn your design from a drawing in a CAD application into a physical board. In this article, we'll cover the basics that designers need to know as part of our crash course series on PCB manufacturing.
If you compile a list of skew sources, you'll see that fiber weave-induced skew is only one entry on a long list of skew sources. We'll look at this list of possible skew sources below, and we'll see how they affect the operation of your PCB. From the list below, we'll see that some of these issues with skew are not simply solved by paying attention to the fiber weave construction in a PCB substrate.
We love answering questions from our readers and YouTube viewers, and one of the recent questions we received relates to EMI from switching elements in a switching regulator is "Should a cutout be placed below the inductor in a switching regulator circuit?". Despite the variations in inductors and their magnetic behavior, there are some general principles that can be used to judge the effects of placing ground near inductors in switching regulator circuits. We’ll look at some of these principles in this article
We are happy to announce that the Altium Designer 22.6 update is now available. Altium Designer 22.6 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
Find 9 mistakes in a PCB design and get added into the lucky draw to win a prize from Altium!
This Semi-Additive Process is an additional tool in the PCB fabricators' toolbox that enables them to provide feature sizes for trace width and spacing that are 25 microns, (1 mil) and below depending on the fabricators' imaging equipment. This provides much more flexibility to breakout out tight BGA areas and the ability to shrink overall circuit size and/ or reduce the number of circuit layers in the design. As the PCB design community embraces the benefits of this new printed circuit board fabrication technique, there are of course many questions to be answered.