News & Updates

Do length-tuning structures create an impedance discontinuity? The answer is an unequivocal “yes”, but it might not matter in your design depending on several factors. Applying a length-tuning structure is equivalent to changing the distance between the traces while meandering. Therefore, you will have a change in the odd-mode impedance of a single trace. The question then becomes: does this deviation in trace impedance in a length tuning structure matter?

The continued miniaturization of both packaging and component size in next-generation electronics is becoming harder and harder to work around and presents a significant challenge for both PCB designers and PCB fabricators. To effectively navigate the constraints of the traditional subtractive-etch PCB fabrication processes, PCB designs require advanced PCB fabrication capabilities while pushing the limits of finer feature size, higher layer counts, multiple levels of stacked micro vias and increased lamination cycles.

Take a look at the inside of some integrated circuit packages, and you’ll find a number of wires bonded to the semiconductor die and the pads at the edge of the component's package. As a signal traverses makes its way along an interconnect and into a destination circuit, signals need to travel across these bond wires and pads before they are interpreted as a logic state. As you look around the edge of an IC, these bond wires can have different lengths, and they incur different levels of delay and contribute to total jitter.

Once you’ve run out of room on your 4-layer PCB, it’s time to graduate to a 6-layer board. The additional layer can give you room for more signals, an additional plane pair, or a mix of conductors. How you use these extra layers is less important than how you arrange them in the PCB stackup, as well as how you route on a 6-layer PCB. If you’ve never used a 6-layer board before, or you’ve had EMI troubles with this stackup that are difficult to solve, keep reading to see some 6-layer PCB design guidelines and best practices.

We are happy to announce that the Altium Designer 22.5 update is now available. Altium Designer 22.5 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!

PCB stackups often incorporate slightly dissimilar materials that could pose a reliability problem. Hybrid PCBs are one case where the PCB stackup will include different materials, typically a standard FR4 laminate and a PTFE laminate for RF PCBs. Designers who want to take the lead on material selection when designing their hybrid stackups should consider these factors that affect reliability. As with any PCB stackup, make sure you get your fabricator involved in the manufacturing process early to ensure reliability problems do not arise during production.

In a previous article about circuit simulation and reliability, I looked at how Monte Carlo analysis is commonly used to evaluate circuits that are subject to random variations in component values. Sensitivity analysis is a bit different and it tells you how the operating characteristics of your circuit change in a specific direction. Compared to a Monte Carlo simulation, sensitivity analysis gives you a convenient way to predict exactly how the operating characteristics will change if you were to deliberately increase or decrease the value of a component.

Field Programmable Gate Arrays, or FPGAs, have become ubiquitous amongst high-speed, real-time digital systems. The speed at which FPGAs operate continues to increase at a dizzying pace but their adoption into Continuous Integration pipelines seems not to trail as closely. In this article we will review the concept of CI pipelines, their application to FPGAs, and look at examples on how to set this up.