News & Updates
Just as you get used to PCIe 5.0, they decide to release another standard! The newest iteration of PCIe is Gen6, or PCIe 6.0. PCIe 6.0 brings a doubling of channel bandwidth through introduction of PAM-4 as the signaling method in high-speed differential channels. This signaling method is a first for PCIe, and it’s an important enabler of the doubled data rate we see in the current standard. In this article, I’ll run over the important points in the standard and what PCB designers can expect when designing these channels.
One of the common implementations of SPI and I2C in a PCB layout is as a protocol for reading and writing to an external Flash memory. Flash chips are a very common component in embedded systems and can offer high capacities of non-volatile memory up to Gb values. When choosing a memory chip, you'll want to match the application requirements and functionality with the bus speed you need for read and write operations in your memory chip. There is also the matter of the type of Flash memory you'll need to access (NOR vs. NAND).
Being able to design a board in your ECAD environment doesn’t mean that it is manufacturable in real life. You have to make sure your CAD representation won’t have any problems in the real world by taking some precautions. For example, there are certain areas that need to be free of components and have specified clearances like your board edge. This webinar will help you get acquainted with the creation and modification of your board shape so that you can ensure manufacturability.
There is no SPI trace impedance requirement? The reality is that SPI lines only start to need impedance control when the length of the interconnect becomes very long. And because there is no specific impedance requirement in the bus, you have some freedom in channel design and termination. So what exactly qualifies as “very long” and when is some termination method needed? We’ll break it down in this article.
During this year's AltiumLive CONNECT event, I recall receiving an interesting question about the skin effect and the distribution of current due to the presence of ground in coplanar transmission lines. In this article, we'll look at the electric field around a transmission line carrying a signal, and how this might be impacted by the skin effect.
When you get your PCBA back from an assembler, you’ll notice the packaging materials used to pack and ship the PCBA. Those materials are specific to electronics, and if you build products on behalf of clients, it’s important to know the packaging materials used for packing and shipping electronics. In this article I’ll show the main set of materials and equipment used to package electronics assemblies.
Once you've got your PCB layout finished and you're ready to start preparing for manufacturing, one of the critical steps is to create PCB Gerber files. When you're ready to create your Gerber files, you need the right set of CAM processor tools that can take data from your PCB layout. In this article, we'll guide you through this process of how to make PCB Gerber files and show some example tasks you might need to perform to generate them.
There are many aspects to designing a PCB. One of the larger aspects has to do with managing your components. We all need components for our designs, but are those components in our library and designs up-to-date or even purchasable? These questions need to be answered before we can safely use them. Altium Designer® has several tools to help you manage the components in your libraries and designs.
One of the major factors impacting reliability of a PCBA is the use of teardrops on traces in the PCB. Like many aspects of reliability, the considerations also span into the signal integrity domain, particularly as more high-reliability products require greater data handling capabilities and run at higher speeds. In this article, I’ll break down the issues present in teardrop usage on differential pairs and how these may affect impedance.
High-reliability electronics must go through multiple rounds of testing and qualification to ensure they can withstand their intended operating environment. Designing to performance standards, whether the baseline IPC standards or more stringent industry standards, is the first step in ensuring a reliable circuit board. In this e-book, readers will gain a thorough look into PCB testing and analysis, starting from basic tests performed on bare boards and completed assemblies.
Coupling capacitors find plenty of uses in analog applications and on differential protocols, acting essentially as high pass filters that remove DC bias carried seen on a signal. In the case of PCIe, there are a few reasons to place AC coupling capacitors on differential pairs beyond the fact that AC coupling capacitors are listed in the standard. In this article, we’ll look briefly at where to place coupling capacitors on PCIe links, as well as the reasons these are placed on PCIe links.
We are happy to announce that the Altium Designer 22.7 update is now available. Altium Designer 22.7 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
Design to cost is a lofty idea that is only perfectly executed when supply and demand for components are in perfect harmony. Unfortunately, the current landscape for component sourcing makes design to cost more of a balancing act rather than an exercise in price reduction. To help designers in their efforts to balance cost, capabilities, and procurement, we created this ebook to help users understand how modern supply chain tools can help in these complex design problems.
Stubs are an important topic in high-speed PCB design, and there is a longstanding guideline that stubs should always be removed from all vias on high-speed digital interconnects. While stubs are bad for high-speed lines, they do not always need to be removed. What is more important is to predict the loss profile and frequencies, and to floorplan appropriately to try and prevent such losses.
Once you finish your placement and routing in your PCB layout, it can be tempting to wrap up the layout and send everything in directly to manufacturing. The reality is that the board may still need some work before it is considered finished. The cleanup you perform at the final stage of PCB layout will help you catch any outstanding errors that can't be programmed into your DRC engine, and it gives you a chance to add any outstanding details to the surface layers.
In this project we’ll be building a moderate sized LED panel on insulated metal substrate (IMS). This light panel has three different white balance High CRI LED types on it, warm, neutral and cool. By changing the brightness of the different white balances, the light from the panel can be adjusted to match other lighting, making it perfect for film use - but also creating perfect lighting for electronics work. As with all my projects, this LED panel is open source, you can find the Altium project files over on my GitHub released under the permissive MIT License.
Every design should begin with selecting the materials that will appear in the PCB stackup, as well as arranging layers in the stackup to support layout and routing. This section of our PCB manufacturing andc DFM crash course focuses on selecting the right materials for your PCB design. Materials should be selected given the particular design requirements outlined in your specifications.
FPGAs come in quad or BGA packages that can be difficult to floorplan, especially with the high number of I/Os often implemented in these components. FPGAs offer a lot of advantages in terms of their reconfigurability, but they can require a lot of effort to layout and route without headaches. If you’ve never worked with an FPGA in your PCB layout, we have some guidelines that can help you get started.
S-parameters are fundamental quantities in signal integrity, and an ability to understand them from measurement or analysis is very important. If you have a 3-port network, like a power divider or circulator, it may appear that you must use a 3-port VNA to measure these S-parameters. It is always acceptable to measure between two ports, but you need to know what exactly it is you are measuring. In this article, we’ll look at the relationship between the true 3-port S-parameters with a 2-port measurement.
Before implementing design for manufacturing, it is important to understand the underlying process behind producing a physical PCB. Regardless of the various technologies present in each facility, a large majority of industry-leading manufacturers follow a specific set of steps to turn your design from a drawing in a CAD application into a physical board. In this article, we'll cover the basics that designers need to know as part of our crash course series on PCB manufacturing.
If you compile a list of skew sources, you'll see that fiber weave-induced skew is only one entry on a long list of skew sources. We'll look at this list of possible skew sources below, and we'll see how they affect the operation of your PCB. From the list below, we'll see that some of these issues with skew are not simply solved by paying attention to the fiber weave construction in a PCB substrate.
We love answering questions from our readers and YouTube viewers, and one of the recent questions we received relates to EMI from switching elements in a switching regulator is "Should a cutout be placed below the inductor in a switching regulator circuit?". Despite the variations in inductors and their magnetic behavior, there are some general principles that can be used to judge the effects of placing ground near inductors in switching regulator circuits. We’ll look at some of these principles in this article
We are happy to announce that the Altium Designer 22.6 update is now available. Altium Designer 22.6 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
Find 9 mistakes in a PCB design and get added into the lucky draw to win a prize from Altium!
This Semi-Additive Process is an additional tool in the PCB fabricators' toolbox that enables them to provide feature sizes for trace width and spacing that are 25 microns, (1 mil) and below depending on the fabricators' imaging equipment. This provides much more flexibility to breakout out tight BGA areas and the ability to shrink overall circuit size and/ or reduce the number of circuit layers in the design. As the PCB design community embraces the benefits of this new printed circuit board fabrication technique, there are of course many questions to be answered.
It’s no secret that component shortages have become more frequent this year. In fact, countries around the world are losing billions in revenue due to supply issues. Having the right components on hand is more crucial than ever as availability, obsolescence, counterfeit products and environmental non-compliance risks continue to grow. Fortunately, many shortages can be avoided by introducing proactive supply chain practices.