News & Updates

Do length-tuning structures create an impedance discontinuity? The answer is an unequivocal “yes”, but it might not matter in your design depending on several factors. Applying a length-tuning structure is equivalent to changing the distance between the traces while meandering. Therefore, you will have a change in the odd-mode impedance of a single trace. The question then becomes: does this deviation in trace impedance in a length tuning structure matter?

The continued miniaturization of both packaging and component size in next-generation electronics is becoming harder and harder to work around and presents a significant challenge for both PCB designers and PCB fabricators. To effectively navigate the constraints of the traditional subtractive-etch PCB fabrication processes, PCB designs require advanced PCB fabrication capabilities while pushing the limits of finer feature size, higher layer counts, multiple levels of stacked micro vias and increased lamination cycles.

Take a look at the inside of some integrated circuit packages, and you’ll find a number of wires bonded to the semiconductor die and the pads at the edge of the component's package. As a signal traverses makes its way along an interconnect and into a destination circuit, signals need to travel across these bond wires and pads before they are interpreted as a logic state. As you look around the edge of an IC, these bond wires can have different lengths, and they incur different levels of delay and contribute to total jitter.

Once you’ve run out of room on your 4-layer PCB, it’s time to graduate to a 6-layer board. The additional layer can give you room for more signals, an additional plane pair, or a mix of conductors. How you use these extra layers is less important than how you arrange them in the PCB stackup, as well as how you route on a 6-layer PCB. If you’ve never used a 6-layer board before, or you’ve had EMI troubles with this stackup that are difficult to solve, keep reading to see some 6-layer PCB design guidelines and best practices.

There are many aspects to designing a PCB. One of the larger aspects has to do with managing your components. We all need components for our designs, but are those components in our library and designs up-to-date or even purchasable? These questions need to be answered before we can safely use them. If not, we could just be wasting our time designing with invalid components. Altium Designer® has several tools to help you manage the components in your libraries and designs.

We are happy to announce that the Altium Designer 22.5 update is now available. Altium Designer 22.5 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!

PCB stackups often incorporate slightly dissimilar materials that could pose a reliability problem. Hybrid PCBs are one case where the PCB stackup will include different materials, typically a standard FR4 laminate and a PTFE laminate for RF PCBs. Designers who want to take the lead on material selection when designing their hybrid stackups should consider these factors that affect reliability. As with any PCB stackup, make sure you get your fabricator involved in the manufacturing process early to ensure reliability problems do not arise during production.

In a previous article about circuit simulation and reliability, I looked at how Monte Carlo analysis is commonly used to evaluate circuits that are subject to random variations in component values. Sensitivity analysis is a bit different and it tells you how the operating characteristics of your circuit change in a specific direction. Compared to a Monte Carlo simulation, sensitivity analysis gives you a convenient way to predict exactly how the operating characteristics will change if you were to deliberately increase or decrease the value of a component.

Field Programmable Gate Arrays, or FPGAs, have become ubiquitous amongst high-speed, real-time digital systems. The speed at which FPGAs operate continues to increase at a dizzying pace but their adoption into Continuous Integration pipelines seems not to trail as closely. In this article we will review the concept of CI pipelines, their application to FPGAs, and look at examples on how to set this up.

Conflicts can occur when multiple people work on the same project simultaneously. The user might not realize that they are not looking at the latest version of the documentation, leading to problems later. To address this issue, Altium features an intuitive graphical user interface that allows you to examine conflicts quickly and carefully

EDA tools have come a long way since the advent of personal computing. Now advanced routing features like auto-routers, interactive routing, length tuning, and pin-swapping are helping designers stay productive, especially as device and trace densities increase. Routing is normally restricted to 45-degree or right-angle turns with typical layout and routing tools, but more advanced PCB design software allows users to route at any angle they like. So which routing style should you use, and what are the advantages of any angle routing?

If you do a search for “Hardware-in-the-Loop” testing, you will frequently find examples of complex, real-time systems. Article from National Instruments, for example, gives a nice explanation and background on what hardware-in-the-loop (HIL) is, and provides an example of testing electronic control units within an automobile. In this article, we will be focusing on a smaller, more bite-sized version of HIL testing concepts.

If you’re an antenna designer, then you’re likely familiar with all aspects of near-field vs. far-field radiation. Given the litany of radiated EMI problems that cause noise within and outside of an electronic device, one might suddenly realize their new product is acting like a strong antenna. To understand how EMI affects your circuits, it helps to understand exactly how near-field vs. far-field radiation from your PCB affects your ability to pass EMC checks and affects your circuits.

How often have you started down the PCB development process and been bogged down by time-consuming administrative tasks? Once you get ready for production, working through a design review and correcting any DFM problems takes its own share of time. With hastening product development timelines and shorter product life cycles comes the pressure to increase PCB prototype iteration speed without sacrificing cost or quality. So how can PCB design teams keep their development schedules on track without sacrificing quality or risking a failed prototyping run?

A journey of a thousand miles begins with a single step, or so the aphorism goes. I think it’s worth noting that the first step is the most difficult to take. Analysis Paralysis is especially true when dealing with a new software package, including the recent release of Concord Pro. The recent version has brought with it a deluge of interest and enthusiasm in such a phenomenal tool. But I must say, Altium hit this one out of the park.

When you need to pass EMC certification and your new product is being crippled by a mysterious source of EMI, you’ll probably start considering a complete product redesign. Your stackup, trace geometry, and component arrangement are good places to start, but there might be more you can do to suppress specific sources of EMI. There are many different types of EMI filters that you can easily place in your design, and that will help suppress EMI in a variety of frequency ranges.

Previously, I described the PCB fabrication operations relative to inner layer processing, lamination, drilling, and plating. The last step in the process is outer layer processing which is described below. Once the desired plated copper thickness of a PCB has been achieved, it’s necessary to etch away the copper between the features in order to define the outer layer pattern.

There are many factors at play in determining the impact of inductance on high-frequency power distribution systems. Two topic areas, inductance of the decoupling capacitor and inductance of the power planes, were addressed in earlier articles. This article will focus on the inductance of the capacitor footprint and via inductance from the capacitor footprint back to the PCB power planes.

High-speed buses, whether single-ended or differential, can experience any number of signal integrity problems. A primary problem created by propagating signals is crosstalk, where a signal superimposes itself on a nearby trace. The industry-standard PCB design tools in Altium Designer® already include a post-layout simulator for examining crosstalk. Still, you can speed up crosstalk analysis in parallel buses when you use a powerful field solver.

Any time-dependent physical system with feedback and gain has conditions under which the system will reach stable behavior. Amplifier stability extends these concepts to amplifiers, where the system output can grow to an undesired saturated state due to unintended feedback. If you use the right design and simulation tools, you can easily account for potential instability in your circuit models before you create your layout.

The concept of design variants entails taking a single PCB design, and then on the assembly side, modifying specific components used in the design. Either by not installing, not installing, or choosing alternate components as replacements on a specific assembly to ultimately create different end products. In that way, you could support multiple product lines. This article describes the approach to working with variants.

Before anything else, some advice. The revisions and lifecycle are an area that takes some planning. It used to be that Concord Pro was primarily for components, but now it has gone far beyond that. With the ability to store and manage many other items, including your various templates, projects, even PDF documents, not everything will have the same revision scheme. Concord Pro is so powerful that it can handle any revision scheme you’d want to set up.

Whether the board will be placed in a high pressure vessel or underwater, your design will need to withstand pressure to avoid failure. On the enclosure side, your vessel should be rated up to a certain pressure and may require frequent cycling to prevent implosion. On the electronics side, component selection and layout (especially at high voltage) become critical to preventing failure and ensuring reliability.

The first update of Altium Designer 20.2 and Altium NEXUS Client 3.2 is now available. You can update through the Altium Designer update system ("Extensions and Updates") or download fresh builds from the Downloads section of the Altium website. Click on "Read More" to see a list of all changes in this update.

The history of engineering, both electrical and mechanical, is littered with approximations that have fallen by the wayside. These approximations worked well for a time and helped advance technology significantly over the decades. However, any model has limits on its applicability, and the typical RLCG transmission line model and frequency-independent impedance equations are no different. Copper foil roughness modeling and related transmission line impedance simulations are just one of many areas in which standard models cannot correctly treat signal behavior.

Once you’re planning for production of any new board, you’ll likely be planning a battery of tests for your new product. These tests often focus on functionality and, for high speed/high frequency boards, signal/power integrity. However, you may intend for your product to operate for an extreme period of time, and you’ll need some data to reliably place a lower limit on your product’s lifetime. In addition to in-circuit tests, functional tests, and possibly mechanical tests, the components and boards themselves can benefit from burn-in testing.