News & Updates

EDA tools have come a long way since the advent of personal computing. Now advanced routing features like auto-routers, interactive routing, length tuning, and pin-swapping are helping designers stay productive, especially as device and trace densities increase. Routing is normally restricted to 45-degree or right-angle turns with typical layout and routing tools, but more advanced PCB design software allows users to route at any angle they like. So which routing style should you use, and what are the advantages of any angle routing?

If you do a search for “Hardware-in-the-Loop” testing, you will frequently find examples of complex, real-time systems. Article from National Instruments, for example, gives a nice explanation and background on what hardware-in-the-loop (HIL) is, and provides an example of testing electronic control units within an automobile. In this article, we will be focusing on a smaller, more bite-sized version of HIL testing concepts.

No one wants to do a board respin because of inaccurate or incomplete manufacturing outputs confusing design intent. This webinar covers the information needed for PCB Manufacturing and Assembly, as well as, a simple way to communicate and collaborate with manufacturing.

If you’re an antenna designer, then you’re likely familiar with all aspects of near-field vs. far-field radiation. Given the litany of radiated EMI problems that cause noise within and outside of an electronic device, one might suddenly realize their new product is acting like a strong antenna. To understand how EMI affects your circuits, it helps to understand exactly how near-field vs. far-field radiation from your PCB affects your ability to pass EMC checks and affects your circuits.

How often have you started down the PCB development process and been bogged down by time-consuming administrative tasks? Once you get ready for production, working through a design review and correcting any DFM problems takes its own share of time. With hastening product development timelines and shorter product life cycles comes the pressure to increase PCB prototype iteration speed without sacrificing cost or quality. So how can PCB design teams keep their development schedules on track without sacrificing quality or risking a failed prototyping run?

A journey of a thousand miles begins with a single step, or so the aphorism goes. I think it’s worth noting that the first step is the most difficult to take. Analysis Paralysis is especially true when dealing with a new software package, including the recent release of Concord Pro. The recent version has brought with it a deluge of interest and enthusiasm in such a phenomenal tool. But I must say, Altium hit this one out of the park.

When you need to pass EMC certification and your new product is being crippled by a mysterious source of EMI, you’ll probably start considering a complete product redesign. Your stackup, trace geometry, and component arrangement are good places to start, but there might be more you can do to suppress specific sources of EMI. There are many different types of EMI filters that you can easily place in your design, and that will help suppress EMI in a variety of frequency ranges.

Previously, I described the PCB fabrication operations relative to inner layer processing, lamination, drilling, and plating. The last step in the process is outer layer processing which is described below. Once the desired plated copper thickness of a PCB has been achieved, it’s necessary to etch away the copper between the features in order to define the outer layer pattern.

There are many factors at play in determining the impact of inductance on high-frequency power distribution systems. Two topic areas, inductance of the decoupling capacitor and inductance of the power planes, were addressed in earlier articles. This article will focus on the inductance of the capacitor footprint and via inductance from the capacitor footprint back to the PCB power planes.

High-speed buses, whether single-ended or differential, can experience any number of signal integrity problems. A primary problem created by propagating signals is crosstalk, where a signal superimposes itself on a nearby trace. The industry-standard PCB design tools in Altium Designer® already include a post-layout simulator for examining crosstalk. Still, you can speed up crosstalk analysis in parallel buses when you use a powerful field solver.

Any time-dependent physical system with feedback and gain has conditions under which the system will reach stable behavior. Amplifier stability extends these concepts to amplifiers, where the system output can grow to an undesired saturated state due to unintended feedback. If you use the right design and simulation tools, you can easily account for potential instability in your circuit models before you create your layout.

The concept of design variants entails taking a single PCB design, and then on the assembly side, modifying specific components used in the design. Either by not installing, not installing, or choosing alternate components as replacements on a specific assembly to ultimately create different end products. In that way, you could support multiple product lines. This article describes the approach to working with variants.

Before anything else, some advice. The revisions and lifecycle are an area that takes some planning. It used to be that Concord Pro was primarily for components, but now it has gone far beyond that. With the ability to store and manage many other items, including your various templates, projects, even PDF documents, not everything will have the same revision scheme. Concord Pro is so powerful that it can handle any revision scheme you’d want to set up.

Whether the board will be placed in a high pressure vessel or underwater, your design will need to withstand pressure to avoid failure. On the enclosure side, your vessel should be rated up to a certain pressure and may require frequent cycling to prevent implosion. On the electronics side, component selection and layout (especially at high voltage) become critical to preventing failure and ensuring reliability.

You need to define your PCB geometry in the context of your enclosure. If your board cannot physically be assembled into the final product, it doesn't matter how well laid out it is electrically. This webinar focuses on how the MCAD CoDesigner allows you to edit your PCB in the context of a higher-level assembly, allowing you to respect the relevant mechanical constraints.

The first update of Altium Designer 20.2 and Altium NEXUS Client 3.2 is now available. You can update through the Altium Designer update system ("Extensions and Updates") or download fresh builds from the Downloads section of the Altium website. Click on "Read More" to see a list of all changes in this update.

The problem with every via impedance calculator that I have seen is simple: they are incomplete or totally wrong. The “incomplete” part refers to a lack of context; these calculators can roughly reproduce a well-known estimate from a legend like Howard Johnson in his Digital Design textbooks. However, these calculators never provide insight into what they are actually calculating, or where the calculated via impedance is accurate. Keep reading to see why these calculators get it so wrong, as well as the context surrounding via impedance.

When designing high power circuits (usually very high voltage and/or current), you’ll need to create a regulator from scratch and place it in your PCB layout. It's also the case that you may want to model a real component using discretes in a simulation in order to qualify the system's expected operating regime. As part of buck converter design, you can easily run a buck converter simulation directly in Altium Designer’s schematic editor. Here’s how you can access these features in the newest version of Altium Designer.

Just as you get used to PCIe 5.0, they decide to release another standard! The newest iteration of PCIe is Gen6, or PCIe 6.0. PCIe 6.0 brings a doubling of channel bandwidth through introduction of PAM-4 as the signaling method in high-speed differential channels. This signaling method is a first for PCIe, and it’s an important enabler of the doubled data rate we see in the current standard. In this article, I’ll run over the important points in the standard and what PCB designers can expect when designing these channels.

One of the common implementations of SPI and I2C in a PCB layout is as a protocol for reading and writing to an external Flash memory. Flash chips are a very common component in embedded systems and can offer high capacities of non-volatile memory up to Gb values. When choosing a memory chip, you'll want to match the application requirements and functionality with the bus speed you need for read and write operations in your memory chip. There is also the matter of the type of Flash memory you'll need to access (NOR vs. NAND).

There is no SPI trace impedance requirement? The reality is that SPI lines only start to need impedance control when the length of the interconnect becomes very long. And because there is no specific impedance requirement in the bus, you have some freedom in channel design and termination. So what exactly qualifies as “very long” and when is some termination method needed? We’ll break it down in this article.

During this year's AltiumLive CONNECT event, I recall receiving an interesting question about the skin effect and the distribution of current due to the presence of ground in coplanar transmission lines. In this article, we'll look at the electric field around a transmission line carrying a signal, and how this might be impacted by the skin effect.

When you get your PCBA back from an assembler, you’ll notice the packaging materials used to pack and ship the PCBA. Those materials are specific to electronics, and if you build products on behalf of clients, it’s important to know the packaging materials used for packing and shipping electronics. In this article I’ll show the main set of materials and equipment used to package electronics assemblies.

Once you've got your PCB layout finished and you're ready to start preparing for manufacturing, one of the critical steps is to create PCB Gerber files. When you're ready to create your Gerber files, you need the right set of CAM processor tools that can take data from your PCB layout. In this article, we'll guide you through this process of how to make PCB Gerber files and show some example tasks you might need to perform to generate them.

One of the major factors impacting reliability of a PCBA is the use of teardrops on traces in the PCB. Like many aspects of reliability, the considerations also span into the signal integrity domain, particularly as more high-reliability products require greater data handling capabilities and run at higher speeds. In this article, I’ll break down the issues present in teardrop usage on differential pairs and how these may affect impedance.

High-reliability electronics must go through multiple rounds of testing and qualification to ensure they can withstand their intended operating environment. Designing to performance standards, whether the baseline IPC standards or more stringent industry standards, is the first step in ensuring a reliable circuit board. In this e-book, readers will gain a thorough look into PCB testing and analysis, starting from basic tests performed on bare boards and completed assemblies.

Coupling capacitors find plenty of uses in analog applications and on differential protocols, acting essentially as high pass filters that remove DC bias carried seen on a signal. In the case of PCIe, there are a few reasons to place AC coupling capacitors on differential pairs beyond the fact that AC coupling capacitors are listed in the standard. In this article, we’ll look briefly at where to place coupling capacitors on PCIe links, as well as the reasons these are placed on PCIe links.

We are happy to announce that the Altium Designer 22.7 update is now available. Altium Designer 22.7 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!

Design to cost is a lofty idea that is only perfectly executed when supply and demand for components are in perfect harmony. Unfortunately, the current landscape for component sourcing makes design to cost more of a balancing act rather than an exercise in price reduction. To help designers in their efforts to balance cost, capabilities, and procurement, we created this ebook to help users understand how modern supply chain tools can help in these complex design problems.

Stubs are an important topic in high-speed PCB design, and there is a longstanding guideline that stubs should always be removed from all vias on high-speed digital interconnects. While stubs are bad for high-speed lines, they do not always need to be removed. What is more important is to predict the loss profile and frequencies, and to floorplan appropriately to try and prevent such losses.

Once you finish your placement and routing in your PCB layout, it can be tempting to wrap up the layout and send everything in directly to manufacturing. The reality is that the board may still need some work before it is considered finished. The cleanup you perform at the final stage of PCB layout will help you catch any outstanding errors that can't be programmed into your DRC engine, and it gives you a chance to add any outstanding details to the surface layers.

In this project we’ll be building a moderate sized LED panel on insulated metal substrate (IMS). This light panel has three different white balance High CRI LED types on it, warm, neutral and cool. By changing the brightness of the different white balances, the light from the panel can be adjusted to match other lighting, making it perfect for film use - but also creating perfect lighting for electronics work. As with all my projects, this LED panel is open source, you can find the Altium project files over on my GitHub released under the permissive MIT License.