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IPC 6012 Class 3 Annular Ring
Blog
Meeting Standards: IPC 6012 Class 3 Annular Ring

Designers often conflate leftover annular ring and pad sizes - they need to place a sufficiently large pad size on the surface layer to ensure that the annular ring that is leftover during fabrication will be large enough. As long as the annular ring is sufficiently large, the drill hit will not be considered defective and the board will have passed inspection. In this article, I'll discuss the limits on IPC-6012 Class 3 annular rings as these are a standard fabrication requirement for high-reliability rigid PCBs.

Embedded thumbnail for How to Work with The Polygon Manager
Working with Polygons
How to Work with The Polygon Manager

It is important to have a high-level view of all polygons on the PCB design. The Polygon Manager lets you rename polygons, set their pour order, perform re-pouring or disable pouring on selected polygons, add/scope the polygon connection style and clearance design rules, and add polygon classes for selected polygons.

PCB fabrication notes
Blog
Decoding PCB Fabrication Notes

Sending a board out for fabrication is an exciting and nerve-wracking moment. Why not just give your fabricator your design files and let them figure it out? There are a few reasons for this, but it means the responsibility comes back to you as the designer to produce manufacturing files and documentation for your PCB. It’s actually quite simple if you have the right design tools. We’ll look at how you can do this inside your PCB layout and how this will help you quickly generate data for your manufacturer.

Embedded thumbnail for Assigning Impedance Profiles for Differential Pairs
How to Work with Differential Pairs
Assigning Impedance Profiles for Differential Pairs

When you assign an impedance profile to a differential pair you open up several options for control over your routes. We'll show you how to do just that, as well as how to fix errors that may pop up and how to create classes for differential pairs based on assigned impedance profiles.

Embedded thumbnail for How to Highlight or Select Net Connections in the PCB
How-To's
How to Highlight or Select Net Connections in the PCB

We’ll show you how to highlight net selections so you can easily track where connections are made. We’ll show you how to hide and show nets, and how to use the view configuration and PCB panels to view and highlight nets across your design, and how to assign net colors in both the PCB and the schematic.

HDI PCB design and HDI PCB manufacturing process
Blog
Design Basics for HDI and the HDI PCB Manufacturing Process

As the world of technology has evolved, so has the need to pack more capabilities into smaller packages. PCBs designed using high-density interconnect techniques tend to be smaller as more components are packed in a smaller space. An HDI PCB uses blind, buried, and micro vias, vias in pads, and very thin traces to pack more components into a smaller area. We’ll show you the design basics for HDI and how Altium Designer® can help you create a powerful HDI PCB.

Embedded thumbnail for Remove Unused Via Pads
How to Design a BGA
Remove Unused Via Pads

The Remove Unused Pad Shapes tool in Altium Designer gives you control over the via pads in your design. We’ll show you how to use it to increase the usable area of power and ground polygons, increase the density of conductors between hole rows, and fixing incorrect connections.

All About PCB Test Points
Blog
Is It Printed or a Component? All About PCB Test Points

Test points in your electronic assembly will give you a location to access components and take important measurements to verify functionality. If you’ve never used a test point or you’re not sure if you need test points, keep reading to see what options you have for test point usage in your PCB layout.

Embedded thumbnail for Tent Vias under BGA
How to Design a BGA
Tent Vias under BGA

When via are located close to component pads some soldering issues can arise, but this can be fixed with Tented vias. We’ll show you how to manually tent vias and how to tent vias through the Design Rules.

How to Design to a Differential Impedance Specification
Blog
How to Design to a Differential Impedance Specification

The concept and implementation of differential impedance are both sometimes misunderstood. In addition, the design of a channel to reach a specific differential impedance is often done in a haphazard way. The very concept of differential impedance is something of a mathematical construct that doesn’t fully capture the behavior of each signal in a differential trace. Keep reading to see a bit more depth on how to design to a differential impedance spec and exactly what it means for your design.

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How to Design a BGA
Via-in-Pad for BGA

We’ll teach you how to use Via-in-pad to reduce inductance, improve signal integrity, and improve power distribution system performance in BGA designs.

Embedded thumbnail for Using HDI Stackups during BGA Design
How to Design a BGA
Using HDI Stackups during BGA Design

Micro Vias and Buried Vias play an important role in high density interconnection layer stackups (HDI Stackups). We’ll show you how to add via and create rules to allow you to take full advantage of the HDI Stackup.

Product Lifecycle Management in Electronics Manufacturing
Blog
Product Lifecycle Management in Electronics Manufacturing

An effective product lifecycle management (PLM) solution will integrate the tools and processes employed to design, develop and manufacture a new device. This solution goes beyond engineering activities to include the project management, process control, and financial management of the end-to-end business processes. PLM solutions create this collaborative environment where product development can flourish, bringing additional benefits in efficiencies and transparent communications, breaking silos, and speeding up the development process.

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On-Demand Webinar
Length Matching in High Speed Buses

With ever increasing speeds in high-speed data systems comes a couple of PCB layout challenges. High-speed busses like DDR, VME, PCIe just to mention a few can all reach data transfer speeds that require strict timing with very tight tolerances, thereby leaving very little slack in the PCB layout. Watch this on-demand webinar to learn why it's imperative to match track lengths in high-speed data systems and differential signals. You’ll see how to properly define PCB length matching and time delay constraints, and how to effectively route high-speed signals in Altium Designer®.

Tight versus loose coupling
Blog
Should You Use Tight vs. Loose Differential Pair Spacing and Coupling?

In this article, we want to get closer to a realistic description of tight coupling vs. loose coupling in terms of differential pair spacing, as well as how the differential pair spacing affects things like impedance, differential-mode noise, reception of common-mode noise, and termination. As we’ll see, the focus on tight coupling has its merits, but it’s often cited as necessary for the wrong reasons.

Embedded thumbnail for Automatic Fanout With BGA
How to Design a BGA
Automatic Fanout With BGA

When routing a BGA it can be necessary to use automatic fanout to make the routing process easier and faster. We’ll show you how to run the automatic fanout for routing a BGA and how the rules can affect the outcome of the route.

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How to Design a BGA
Specifying NSMD and SMD for BGA

BGA layouts use two types of pads: SMD, Solder Mask Pads, or NSMD, Non-Solder Mask Pads. Here we’ll walk you through the differences and how to specify and edit them for your layout.

Engineering Design Review Guide
Blog
How to Solve Your Engineering Design Review Challenges

You’ve possibly gone through plenty of engineering design reviews, both on the front-end of a project and the back-end before manufacturing. Engineering design reviews are performed to accomplish multiple objectives, and with many engineering teams taking a systems-based approach to design and production, electronics design teams will need to review much more than just a PCB layout and BOM. Today’s challenges with sourcing, manufacturability, reliability, and mechanical constraints are all areas that must be confronted in real designs

Embedded thumbnail for Via Shielding and Stitching
Via Stitching
Via Shielding and Stitching

Altium Designer gives you full control over your via shielding and stitching. We’ll show you how to use our shielding and stitching tools, how to alter their parameters, and how to remove any unwanted via shielding and stitching.

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Blog 4月 22, 2020
Any Angle Routing: When Should You Use It?

EDA tools have come a long way since the advent of personal computing. Now advanced routing features like auto-routers, interactive routing, length tuning, and pin-swapping are helping designers stay productive, especially as device and trace densities increase. Read full article in our blog:

Blog 3月 20, 2020
A Message from Altium on COVID-19

We understand that many of you, like ourselves, have transitioned to working remotely. This process comes with its challenges and we would like to offer all and any help we can to minimize disruptions for your teams and business.

Blog 3月 2, 2020
About Altium Designer Home Page

With the new Altium Designer Home page, we are aiming to help users stay up to date with the latest features and productivity tricks available in Altium Designer. Learn more about the Home page in this documentation article.

altium-community-forum
Blog 2月 25, 2020
Getting Connected: Altium’s User Community Forums

The Altium design environment is a complex and sophisticated set of software tools. Not surprisingly, becoming proficient with these tools will take some time, and you’ll need to practice every step of the design process from beginning to end. So what happens if you get stuck along the way?

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NEW
Embedded thumbnail for Coming Soon: Interactive Dynamic Phase Tuning
New in Altium's Software
Coming Soon: Interactive Dynamic Phase Tuning

The Interactive Length Tuning tool allows you to manually tune a single net in a differential pair while maintaining equal pair length and phase alignment across the entire route. This enables more efficient differential signal transmission, greater control during manual tuning, and faster pattern creation within defined phase tolerance limits.

NEW
Embedded thumbnail for AI PCB Layout vs. Human Design: The Honest Truth
How-To's
AI PCB Layout vs. Human Design: The Honest Truth

The question is: Can AI really route a PCB as well as an experienced human designer? In this video, we set out to find the answer. Our expert, Zach Peterson, puts it to the test in a side-by-side layout review. The challenge is based on a LinkedIn post where viewers had to guess which board was AI-generated and which was designed by a human.

Embedded thumbnail for Improve Your 3D Wire Bonding Workflow
New in Altium's Software
Improve Your 3D Wire Bonding Workflow

Check out the video where we showcase enhanced wire bonding features, including precise bond wire shape definition, improved clearance checking, streamlined import and export workflows, and efficient management of wire bonding objects.

Embedded thumbnail for Customize Your ODB++ Output for Each Partner
New in Altium's Software
Customize Your ODB++ Output for Each Partner

You can now precisely control what design data is included in your ODB++ outputs for different manufacturing recipients. Choose which signal layers to export, decide how the netlist is handled (included, disabled, or neutralized), and control whether component data is removed or shared without properties.

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Altium Stories
Proper Voltage Built a Universal Battery Platform with Altium

Watch our latest customer success story to see how Proper Voltage partnered with Altium to accelerate high-power battery development for next-generation robotics. With our software, they streamlined collaboration, sped up design reviews, improved sourcing visibility, and reduced risk.

Embedded thumbnail for Improve Readability with Custom Pin Spacing
New in Altium's Software
Improve Readability with Custom Pin Spacing

You can now control the vertical spacing of a pin’s designator and name with a custom margin. This setting can be applied globally via Schematic Preferences or adjusted individually in the Pin properties.

Embedded thumbnail for Does Decoupling Capacitor Placement Actually Matter?
How-To's
Does Decoupling Capacitor Placement Actually Matter?

Our new video tackles common questions about capacitor placement on a PCB. Expert Zach Peterson explains why placement is often less critical on multilayer boards with well-designed power and ground planes and shares the key insights most application notes leave out.

Embedded thumbnail for Teaching Power to Think - How Proper Voltage Accelerates Innovation with Altium
Altium Stories
Teaching Power to Think - How Proper Voltage Accelerates Innovation with Altium

Watch the video where you can find how Proper Voltage centralized communication, synchronized ECAD–MCAD development, and gained early insight into supply chain risks using Altium’s connected design platform.

Embedded thumbnail for  Detect Z-Axis Clearance Issues Earlier
New in Altium's Software
Detect Z-Axis Clearance Issues Earlier

The Z-axis clearance rule enables accurate verification of minimum interlayer copper spacing. It supports targeted constraints between net classes, differential pairs, and schematic parameter directives for advanced rule definition.

Embedded thumbnail for Fix Inconsistent Part Parameters in Your PCB Schematic
How-To's
Fix Inconsistent Part Parameters in Your PCB Schematic

Watch our latest video to learn what parameterization really means, why getting the manufacturer name and part number right is essential, and how to quickly identify inconsistencies across your schematic components using Altium’s Parameter Manager tool.

Embedded thumbnail for Create IPC-Aligned Footprints with Less Effort
New in Altium's Software
Create IPC-Aligned Footprints with Less Effort

The default value for the Solder Mask Expansion rule has been updated to improve consistency across design environments. In both PCB documents and rule-driven solder mask expansion within PCB library documents, the default setting is now 0 mil, replacing the previous default of 4 mil.

Embedded thumbnail for Via Dispersion: Why Propagation Delay Changes with Frequency
How-To's
Via Dispersion: Why Propagation Delay Changes with Frequency

Explore the concept of via dispersion and how it impacts propagation delay across frequencies. This tutorial walks through the math behind extracting delay from insertion loss and return loss S-parameters and explains why results can vary depending on your operating range.

Embedded thumbnail for Make Via Rule Configuration More Intuitive
New in Altium's Software
Make Via Rule Configuration More Intuitive

Set precise control over your routing via styles with new rule settings in the Physical View. Define minimum, maximum, and preferred values for both diameter and hole size, and easily switch between constraint ranges or template-based definitions for faster, more flexible design.

Embedded thumbnail for Coplanar Ground Done Right: PCB Design Best Practices
How-To's
Coplanar Ground Done Right: PCB Design Best Practices

When is coplanar ground actually useful and when does it provide no benefit at all? If you’ve ever wondered about this, check out our brand-new video where we tackle one of the most common questions in PCB design.

Embedded thumbnail for Import and Export with Modern Mechanical Models
New in Altium's Software
Import and Export with Modern Mechanical Models

We have expanded mechanical integration by adding support for SOLIDWORKS 2024 and SOLIDWORKS 2025 part models when importing 3D bodies into the design environment. This enhancement allows designers to work with the latest mechanical models created in SOLIDWORKS without the need for additional conversions or workarounds.

Embedded thumbnail for How to Input Via Delay in Altium for DDR Routing
How-To's
How to Input Via Delay in Altium for DDR Routing

In this video, we tackle a real viewer question about DDR3 routing across multiple PCB layers and show how via delay can silently eat into your skew margin before you’ve even finished routing, using Altium’s default 10-layer stackup as a reference.

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