News & Updates
The continued miniaturization of both packaging and component size in next-generation electronics is becoming harder and harder to work around and presents a significant challenge for both PCB designers and PCB fabricators. To effectively navigate the constraints of the traditional subtractive-etch PCB fabrication processes, PCB designs require advanced PCB fabrication capabilities while pushing the limits of finer feature size, higher layer counts, multiple levels of stacked micro vias and increased lamination cycles.
Take a look at the inside of some integrated circuit packages, and you’ll find a number of wires bonded to the semiconductor die and the pads at the edge of the component's package. As a signal traverses makes its way along an interconnect and into a destination circuit, signals need to travel across these bond wires and pads before they are interpreted as a logic state. As you look around the edge of an IC, these bond wires can have different lengths, and they incur different levels of delay and contribute to total jitter.
Once you’ve run out of room on your 4-layer PCB, it’s time to graduate to a 6-layer board. The additional layer can give you room for more signals, an additional plane pair, or a mix of conductors. How you use these extra layers is less important than how you arrange them in the PCB stackup, as well as how you route on a 6-layer PCB. If you’ve never used a 6-layer board before, or you’ve had EMI troubles with this stackup that are difficult to solve, keep reading to see some 6-layer PCB design guidelines and best practices.
We are happy to announce that the Altium Designer 22.5 update is now available. Altium Designer 22.5 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
PCB stackups often incorporate slightly dissimilar materials that could pose a reliability problem. Hybrid PCBs are one case where the PCB stackup will include different materials, typically a standard FR4 laminate and a PTFE laminate for RF PCBs. Designers who want to take the lead on material selection when designing their hybrid stackups should consider these factors that affect reliability. As with any PCB stackup, make sure you get your fabricator involved in the manufacturing process early to ensure reliability problems do not arise during production.
In a previous article about circuit simulation and reliability, I looked at how Monte Carlo analysis is commonly used to evaluate circuits that are subject to random variations in component values. Sensitivity analysis is a bit different and it tells you how the operating characteristics of your circuit change in a specific direction. Compared to a Monte Carlo simulation, sensitivity analysis gives you a convenient way to predict exactly how the operating characteristics will change if you were to deliberately increase or decrease the value of a component.
Field Programmable Gate Arrays, or FPGAs, have become ubiquitous amongst high-speed, real-time digital systems. The speed at which FPGAs operate continues to increase at a dizzying pace but their adoption into Continuous Integration pipelines seems not to trail as closely. In this article we will review the concept of CI pipelines, their application to FPGAs, and look at examples on how to set this up.
Conflicts can occur when multiple people work on the same project simultaneously. The user might not realize that they are not looking at the latest version of the documentation, leading to problems later. To address this issue, Altium features an intuitive graphical user interface that allows you to examine conflicts quickly and carefully
Anytime you place a component in your PCB, it’s almost like you’re gambling. All components have tolerances, and some of these are very precise, but others components can have very wide tolerances on their nominal values. In the event the tolerances on these components become too large, how can you predict how these tolerances will affect your circuits?
Flexible circuits introduce unique assembly challenges that aren't always visible during PCB design, from panel instability and component movement to thermal distortion during reflow. This article explains how design decisions around stiffeners, placement, panelization, and materials can improve assembly yield and reduce costly rework.
Fixing one design problem can sometimes create another you didn't see coming. This article uses the S-80 submarine program to show how better requirements traceability can help teams spot hidden impacts before they turn into expensive rework.
A BOM is only valuable if everyone can trust the data it contains. This article shows how connected BOM management helps teams eliminate errors, improve collaboration, and keep fast-moving hardware projects on schedule.
PCB design rules are the foundation of every successful layout. This article explores how defining and managing constraints helps engineers improve design accuracy, simplify verification, and deliver manufacturing-ready PCBs with confidence.
Great products are built by connected teams, not disconnected tools. This article shows how cloud ECAD platforms enable real-time co-design, structured design reviews, and seamless collaboration across engineering, manufacturing, and supply chain teams.
A five-minute conversation with your fabricator could save weeks of redesign. Discover the ten questions that can improve manufacturability, boost yield, and help your rigid-flex project succeed on the first build.
Finding the right component shouldn't mean searching through dozens of websites and datasheets. This article shows how integrated component search helps engineers select parts faster while reducing sourcing risks and design delays.
The best sourcing decisions happen when procurement is involved early. This webinar demonstrates how BOM Portal gives both engineering and procurement access to live lifecycle, pricing, compliance, and availability data to drive smarter decisions from prototype through production.
This article walks through the complete PCB design workflow, from schematic capture and component selection to layout, design reviews, and manufacturing documentation. It highlights the key decisions at each stage that help engineering teams produce reliable, manufacturable products.
The biggest threat to your power integrity might be outdated design advice. This article challenges five common AC power integrity myths and shows what really matters when designing today's high-speed PCBs.
Your design data may be more exposed than you think. This webinar shows how to identify common security gaps and secure engineering workflows with centralized access control and governance.
Your flex PCB may look perfect in CAD but coverlay doesn't stay perfectly still during manufacturing. This article reveals why designing for lamination behavior is one of the most important steps in building reliable flex circuits.
As hardware development grows more collaborative, disconnected point tools can introduce data inconsistencies, traceability gaps, and costly coordination challenges. This article examines how integrated PCB design environments connect design, mechanical, supply chain, and review workflows to improve efficiency throughout the product lifecycle.
Signal integrity and power integrity are closely connected, with problems in one often affecting the other as designs become faster and more complex. This webinar explains how integrated analysis workflows help engineers evaluate PDN performance, identify potential issues early, and improve overall design quality.
Every manual handoff adds time and risk to the product development process. This article shows how modern design workflows automate routine tasks, improve data visibility, and help engineering teams focus on innovation instead of administration.
Your signal may be perfect on the PCB and fail the moment it crosses a connector. This article explores the hidden SI challenges in multi-board systems and how engineers can eliminate them before they become costly debugging sessions.