News & Updates
One common question from designers is current-carrying capacity of conductors in a PCB. Trace and via current-carrying capacity are legitimate design points to focus on when designing a new board that will carry high current. The goal is to keep conductor temperatures below some appropriate limit, which then helps keep components on the board cool. Let’s dig into the current state of thermal demands on vias in PCBs and how they compare to internal and external PCB traces.
SPICE simulation saves you critical time in the prototyping phase. Understanding your simulation interface makes it simple to analyze how your circuits work in different scenarios. Altium Designer provides an intuitive, dedicated interface to support your simulation verification, setup, and analysis directly in your schematic environment. You also benefit from growing support for popular model formats, as well as generic models, simplifying circuit definition and simulation.
A combination of good printed circuit board design and good shielding mitigates EMI. Good PCB design for EMI shielding revolves around the layout, the placement of filters, and ground planes. A well-designed PCB minimizes parasitic capacitance and ground loops. Keep reading to learn more about PCB shielding.
Any project can get very complex, and the PCB design team needs to track revisions throughout a project. Why worry about tracking revisions? In the event you ever receive changes to product functional requirements, major changes are made to your product’s architecture, or you’re ready to finalize the design and prepare for fabrication, it’s best to clone a project at its current state and begin working on a new version. Keeping track of all these design changes in a PCB design project takes the type of hardware version control tools you’ll find in Altium 365™.
To pour or not to pour, to stitch or not to stitch… Over many years, some common “rules of thumb” have become very popular and, ultimately, taken a bit out of context. Rules of thumb are not always wrong, but taking PCB design recommendations out of context helps justify bad design practices, and it can even affect the producibility of your board. Like many aspects of a physical PCB layout, via stitching and copper pour can be like acid: quite useful if implemented properly, but also dangerous if used indiscriminately.
The primary source of high-speed problems is not due to high clock frequency but rather the fast rise and fall times of component signals. With fast edge rates, reflections may occur at the receiver side, and when the board routing is dense, crosstalk may become a problem. During this webinar, you'll sharpen your knowledge and develop new skills that you can use to design High-Speed PCB's more efficiently and effectively.
Power MOSFETs enable a huge range of electronic systems, specifically in situations where BJTs are not useful or efficient. MOSFETs can be used in high current systems in parallel arrangements, but what about their use in series? Both arrangements of MOSFETs have their pitfalls that designers should consider. Let’s look at MOSFETs in series as they are quite useful in certain systems, but be careful to design your circuits and your PCB for reliability.
I can’t think of a single product I’ve built that doesn’t require capacitors. We often talk a lot about effective series inductance (ESL) in capacitors and its effects on power integrity. What about effective series resistance (ESR)? Is there a technique you can use to determine the appropriate level of resistance, and can you use ESR to your advantage?
If your goal is to hit a target impedance, and you’re worried about how nearby pour might affect impedance, you can get closer than the limits set by the 3W rule. But what are the effects on losses? If the reason for this question isn’t obvious, or if you’re not up-to-date on the finer points of transmission line design, then keep reading to see how nearby ground pour can affect losses in impedance-controlled interconnects.
The primary source of high-speed problems is not due to high clock frequency but rather the fast rise and fall times of component signals. With fast edge rates, reflections may occur at the receiver side, and when the board routing is dense, crosstalk may become a problem. During this webinar, you'll sharpen your knowledge and develop new skills that you can use to design High-Speed PCB's more efficiently and effectively.
It’s no secret that component shortages have become more frequent this year. In fact, countries around the world are losing billions in revenue due to supply issues. Having the right components on hand is more crucial than ever as availability, obsolescence, counterfeit products and environmental non-compliance risks continue to grow. Fortunately, many shortages can be avoided by introducing proactive supply chain practices.
Do length-tuning structures create an impedance discontinuity? The answer is an unequivocal “yes”, but it might not matter in your design depending on several factors. Applying a length-tuning structure is equivalent to changing the distance between the traces while meandering. Therefore, you will have a change in the odd-mode impedance of a single trace. The question then becomes: does this deviation in trace impedance in a length tuning structure matter?
The continued miniaturization of both packaging and component size in next-generation electronics is becoming harder and harder to work around and presents a significant challenge for both PCB designers and PCB fabricators. To effectively navigate the constraints of the traditional subtractive-etch PCB fabrication processes, PCB designs require advanced PCB fabrication capabilities while pushing the limits of finer feature size, higher layer counts, multiple levels of stacked micro vias and increased lamination cycles.
Take a look at the inside of some integrated circuit packages, and you’ll find a number of wires bonded to the semiconductor die and the pads at the edge of the component's package. As a signal traverses makes its way along an interconnect and into a destination circuit, signals need to travel across these bond wires and pads before they are interpreted as a logic state. As you look around the edge of an IC, these bond wires can have different lengths, and they incur different levels of delay and contribute to total jitter.
Once you’ve run out of room on your 4-layer PCB, it’s time to graduate to a 6-layer board. The additional layer can give you room for more signals, an additional plane pair, or a mix of conductors. How you use these extra layers is less important than how you arrange them in the PCB stackup, as well as how you route on a 6-layer PCB. If you’ve never used a 6-layer board before, or you’ve had EMI troubles with this stackup that are difficult to solve, keep reading to see some 6-layer PCB design guidelines and best practices.
We are happy to announce that the Altium Designer 22.5 update is now available. Altium Designer 22.5 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
PCB stackups often incorporate slightly dissimilar materials that could pose a reliability problem. Hybrid PCBs are one case where the PCB stackup will include different materials, typically a standard FR4 laminate and a PTFE laminate for RF PCBs. Designers who want to take the lead on material selection when designing their hybrid stackups should consider these factors that affect reliability. As with any PCB stackup, make sure you get your fabricator involved in the manufacturing process early to ensure reliability problems do not arise during production.
In a previous article about circuit simulation and reliability, I looked at how Monte Carlo analysis is commonly used to evaluate circuits that are subject to random variations in component values. Sensitivity analysis is a bit different and it tells you how the operating characteristics of your circuit change in a specific direction. Compared to a Monte Carlo simulation, sensitivity analysis gives you a convenient way to predict exactly how the operating characteristics will change if you were to deliberately increase or decrease the value of a component.
Field Programmable Gate Arrays, or FPGAs, have become ubiquitous amongst high-speed, real-time digital systems. The speed at which FPGAs operate continues to increase at a dizzying pace but their adoption into Continuous Integration pipelines seems not to trail as closely. In this article we will review the concept of CI pipelines, their application to FPGAs, and look at examples on how to set this up.
Conflicts can occur when multiple people work on the same project simultaneously. The user might not realize that they are not looking at the latest version of the documentation, leading to problems later. To address this issue, Altium features an intuitive graphical user interface that allows you to examine conflicts quickly and carefully
Anytime you place a component in your PCB, it’s almost like you’re gambling. All components have tolerances, and some of these are very precise, but others components can have very wide tolerances on their nominal values. In the event the tolerances on these components become too large, how can you predict how these tolerances will affect your circuits?
If you look in datasheets for most components, you’ll often find a recommended land pattern, usually alongside some mechanical package information and assembly information. This is not always the case with BGA components, especially components with high ball count. There are a few reasons for this that we can speculate: those ball counts might just be too big to put into a single page, or the manufacturer just expects you to know how to create that land pattern.
Molded interconnect devices are essentially plastic molded substrates with traces running along any surface, including at right angles and running vertically. Altium users can use the new 3D Routing extension to design their own component carriers, which can be mounted vertically in a standard assembly process. If you’ve always wanted to vertically mount components or entire circuits, but without the expense of adding a flex section to your design, the new 3D Routing extension with HARTING’s component carrier designs provides a unique solution.
Altium has released version 2.9.0 of the MCAD CoDesigner. This version has the option to exclude small components when transferring from ECAD to MCAD. The arc behavior was improved, and the support for splines in board shape and cutouts was added. With this release, you can now select a specific SOLIDWORKS configuration of a part to use on the board and view the improvements made for Siemens NX.
Altium Designer's world-class PCB design features help users quickly get started with new rigid-flex designs and prepare them for manufacturing. Rigid-flex in Altium Designer starts with designing a manufacturable PCB layer stack complete with via transitions and any calculated impedance requirements. Keep reading to see how Altium Designer supports your flex and rigid-flex designs.
Like any other advanced PCB, success in HDI design comes from designing the right stackup. One common HDI stackup used to support routing into moderate pin count, high-density BGA components is the 2+N+2 PCB layer stack for HDI boards. We’ll explore this stackup more in this article, as well as how it is related to other advanced stackups used in HDI PCBs.