News & Updates
In this article, we’ll discuss the key design features to implement, and steps to take prior to fabrication that will help prevent some common DFM problems. I’ll also provide examples of where I commonly see these PCB DFM problems in signal integrity circuits.
If you’re working with a high-speed digital component, there are some simple power integrity rules that should be followed. However, there is one quantity that is sometimes ignored when building a PDN impedance simulation: the spreading inductance of your plane pair. Here are some points designers should know about the spreading inductance of a plane pair.
In this article, I’ll present some design basics that every new designer should follow to help ensure their design process is successful. Some of these points may challenge the conventional view of how circuit boards are constructed, but they are intended to help balance low noise signaling, manufacturability, and ease of solving a layout.
The primary goal of your traces is to carry signals throughout your board without losses. To do this properly, you must familiarize yourself with the requirements for signals on the printed circuit board and how to optimize the topology of the board in terms of signal integrity. We will analyze the most popular routing cases applicable for using the Gloss and Retrace tools in Altium Designer to optimize your signal integrity.
High voltage PCBs are subject to certain safety and reliability concerns that you won’t find in most other boards. If your fabrication house specializes in high voltage PCBs and keeps materials in stock, they can likely recommend a material set, as well as a standard stackup you might use for certain voltage ranges and frequencies. If you need to choose your own materials, follow the tips below to help you narrow down to the right material set.
There are some guidelines I see many designers implement as a standard practice, often without thinking about it. Some of these practices are misunderstood or implemented without best practices. Others are implemented without thinking about the potential problems. One of these is the use of tented vias, which is sometimes implemented in a PCB layout by default. Is this always the right practice?
The idea of a purely capacitive load is something of a fallacy. Yes, capacitors exist, but all capacitors are non-ideal, and it is this deviation from a theoretical capacitance that determines how to impedance match a load that exhibits capacitive behavior. Let’s take a look at this important aspect of interconnect design and see what it really means to terminate a capacitive load.
There are all sorts of version control systems out there that people have been using with their PCB design software. As discussed in Why Use a Version Control System, we looked at different options ranging for local hard drive storage to sophisticated online revisioning systems. In this article we will be reviewing the differences between a standard VCS and Altium 365.
Version Control Systems (VCS) have been around for many decades within the software world but can be surprisingly new to some folks in the electronics design industry. This article will cover what a VCS is, what it does, and why you should be using one for your PCB design projects.
Designers often conflate leftover annular ring and pad sizes - they need to place a sufficiently large pad size on the surface layer to ensure that the annular ring that is leftover during fabrication will be large enough. As long as the annular ring is sufficiently large, the drill hit will not be considered defective and the board will have passed inspection. In this article, I'll discuss the limits on IPC-6012 Class 3 annular rings as these are a standard fabrication requirement for high-reliability rigid PCBs.
Sending a board out for fabrication is an exciting and nerve-wracking moment. Why not just give your fabricator your design files and let them figure it out? There are a few reasons for this, but it means the responsibility comes back to you as the designer to produce manufacturing files and documentation for your PCB. It’s actually quite simple if you have the right design tools. We’ll look at how you can do this inside your PCB layout and how this will help you quickly generate data for your manufacturer.
It’s no secret that component shortages have become more frequent this year. In fact, countries around the world are losing billions in revenue due to supply issues. Having the right components on hand is more crucial than ever as availability, obsolescence, counterfeit products and environmental non-compliance risks continue to grow. Fortunately, many shortages can be avoided by introducing proactive supply chain practices.
Do length-tuning structures create an impedance discontinuity? The answer is an unequivocal “yes”, but it might not matter in your design depending on several factors. Applying a length-tuning structure is equivalent to changing the distance between the traces while meandering. Therefore, you will have a change in the odd-mode impedance of a single trace. The question then becomes: does this deviation in trace impedance in a length tuning structure matter?
The continued miniaturization of both packaging and component size in next-generation electronics is becoming harder and harder to work around and presents a significant challenge for both PCB designers and PCB fabricators. To effectively navigate the constraints of the traditional subtractive-etch PCB fabrication processes, PCB designs require advanced PCB fabrication capabilities while pushing the limits of finer feature size, higher layer counts, multiple levels of stacked micro vias and increased lamination cycles.
Take a look at the inside of some integrated circuit packages, and you’ll find a number of wires bonded to the semiconductor die and the pads at the edge of the component's package. As a signal traverses makes its way along an interconnect and into a destination circuit, signals need to travel across these bond wires and pads before they are interpreted as a logic state. As you look around the edge of an IC, these bond wires can have different lengths, and they incur different levels of delay and contribute to total jitter.
Once you’ve run out of room on your 4-layer PCB, it’s time to graduate to a 6-layer board. The additional layer can give you room for more signals, an additional plane pair, or a mix of conductors. How you use these extra layers is less important than how you arrange them in the PCB stackup, as well as how you route on a 6-layer PCB. If you’ve never used a 6-layer board before, or you’ve had EMI troubles with this stackup that are difficult to solve, keep reading to see some 6-layer PCB design guidelines and best practices.
We are happy to announce that the Altium Designer 22.5 update is now available. Altium Designer 22.5 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
PCB stackups often incorporate slightly dissimilar materials that could pose a reliability problem. Hybrid PCBs are one case where the PCB stackup will include different materials, typically a standard FR4 laminate and a PTFE laminate for RF PCBs. Designers who want to take the lead on material selection when designing their hybrid stackups should consider these factors that affect reliability. As with any PCB stackup, make sure you get your fabricator involved in the manufacturing process early to ensure reliability problems do not arise during production.
In a previous article about circuit simulation and reliability, I looked at how Monte Carlo analysis is commonly used to evaluate circuits that are subject to random variations in component values. Sensitivity analysis is a bit different and it tells you how the operating characteristics of your circuit change in a specific direction. Compared to a Monte Carlo simulation, sensitivity analysis gives you a convenient way to predict exactly how the operating characteristics will change if you were to deliberately increase or decrease the value of a component.
Field Programmable Gate Arrays, or FPGAs, have become ubiquitous amongst high-speed, real-time digital systems. The speed at which FPGAs operate continues to increase at a dizzying pace but their adoption into Continuous Integration pipelines seems not to trail as closely. In this article we will review the concept of CI pipelines, their application to FPGAs, and look at examples on how to set this up.
Conflicts can occur when multiple people work on the same project simultaneously. The user might not realize that they are not looking at the latest version of the documentation, leading to problems later. To address this issue, Altium features an intuitive graphical user interface that allows you to examine conflicts quickly and carefully
Anytime you place a component in your PCB, it’s almost like you’re gambling. All components have tolerances, and some of these are very precise, but others components can have very wide tolerances on their nominal values. In the event the tolerances on these components become too large, how can you predict how these tolerances will affect your circuits?
If you look in datasheets for most components, you’ll often find a recommended land pattern, usually alongside some mechanical package information and assembly information. This is not always the case with BGA components, especially components with high ball count. There are a few reasons for this that we can speculate: those ball counts might just be too big to put into a single page, or the manufacturer just expects you to know how to create that land pattern.
Molded interconnect devices are essentially plastic molded substrates with traces running along any surface, including at right angles and running vertically. Altium users can use the new 3D Routing extension to design their own component carriers, which can be mounted vertically in a standard assembly process. If you’ve always wanted to vertically mount components or entire circuits, but without the expense of adding a flex section to your design, the new 3D Routing extension with HARTING’s component carrier designs provides a unique solution.
Altium has released version 2.9.0 of the MCAD CoDesigner. This version has the option to exclude small components when transferring from ECAD to MCAD. The arc behavior was improved, and the support for splines in board shape and cutouts was added. With this release, you can now select a specific SOLIDWORKS configuration of a part to use on the board and view the improvements made for Siemens NX.
Altium Designer's world-class PCB design features help users quickly get started with new rigid-flex designs and prepare them for manufacturing. Rigid-flex in Altium Designer starts with designing a manufacturable PCB layer stack complete with via transitions and any calculated impedance requirements. Keep reading to see how Altium Designer supports your flex and rigid-flex designs.
Like any other advanced PCB, success in HDI design comes from designing the right stackup. One common HDI stackup used to support routing into moderate pin count, high-density BGA components is the 2+N+2 PCB layer stack for HDI boards. We’ll explore this stackup more in this article, as well as how it is related to other advanced stackups used in HDI PCBs.