News & Updates
In this article, we’ll discuss the key design features to implement, and steps to take prior to fabrication that will help prevent some common DFM problems. I’ll also provide examples of where I commonly see these PCB DFM problems in signal integrity circuits.
If you’re working with a high-speed digital component, there are some simple power integrity rules that should be followed. However, there is one quantity that is sometimes ignored when building a PDN impedance simulation: the spreading inductance of your plane pair. Here are some points designers should know about the spreading inductance of a plane pair.
In this article, I’ll present some design basics that every new designer should follow to help ensure their design process is successful. Some of these points may challenge the conventional view of how circuit boards are constructed, but they are intended to help balance low noise signaling, manufacturability, and ease of solving a layout.
The primary goal of your traces is to carry signals throughout your board without losses. To do this properly, you must familiarize yourself with the requirements for signals on the printed circuit board and how to optimize the topology of the board in terms of signal integrity. We will analyze the most popular routing cases applicable for using the Gloss and Retrace tools in Altium Designer to optimize your signal integrity.
High voltage PCBs are subject to certain safety and reliability concerns that you won’t find in most other boards. If your fabrication house specializes in high voltage PCBs and keeps materials in stock, they can likely recommend a material set, as well as a standard stackup you might use for certain voltage ranges and frequencies. If you need to choose your own materials, follow the tips below to help you narrow down to the right material set.
There are some guidelines I see many designers implement as a standard practice, often without thinking about it. Some of these practices are misunderstood or implemented without best practices. Others are implemented without thinking about the potential problems. One of these is the use of tented vias, which is sometimes implemented in a PCB layout by default. Is this always the right practice?
The idea of a purely capacitive load is something of a fallacy. Yes, capacitors exist, but all capacitors are non-ideal, and it is this deviation from a theoretical capacitance that determines how to impedance match a load that exhibits capacitive behavior. Let’s take a look at this important aspect of interconnect design and see what it really means to terminate a capacitive load.
There are all sorts of version control systems out there that people have been using with their PCB design software. As discussed in Why Use a Version Control System, we looked at different options ranging for local hard drive storage to sophisticated online revisioning systems. In this article we will be reviewing the differences between a standard VCS and Altium 365.
Version Control Systems (VCS) have been around for many decades within the software world but can be surprisingly new to some folks in the electronics design industry. This article will cover what a VCS is, what it does, and why you should be using one for your PCB design projects.
Designers often conflate leftover annular ring and pad sizes - they need to place a sufficiently large pad size on the surface layer to ensure that the annular ring that is leftover during fabrication will be large enough. As long as the annular ring is sufficiently large, the drill hit will not be considered defective and the board will have passed inspection. In this article, I'll discuss the limits on IPC-6012 Class 3 annular rings as these are a standard fabrication requirement for high-reliability rigid PCBs.
As the PCB design community embraces the benefits of this new printed circuit board fabrication technique, there are of course many questions to be answered. Today’s blog will address some of the most commonly asked questions related to circuit layer stack up as people are introduced to this new technology.
We are happy to announce that the Altium Designer 22.9 update is now available. Altium Designer 22.9 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
The highest performing operational amplifiers often need a split supply with positive and negative voltages connected to the op amps supply rails. In this project, we’re going to be building a positive/negative dual rail power supply for a differential oscilloscope probe I’m designing. I’m making the power supply a separate project, as a dual rail supply is quite useful to have, and I’m sure I’ll find multiple uses for it in the future.
Importing file-based libraries from your local computer or network drive to your Altium 365 workspace can be done using the Library Importer. Altium’s Library Migrator was renamed Library Importer—the feature’s name was changed to conform more closely to the tool’s purpose. Not only is its name new, but our team has also made several user experience improvements. We have updated the documentation to reflect this change.
The PCB materials industry has spent significant amounts of time developing materials that provide lowest possible signal loss for products with RF applications. For high speed and high frequency designs, losses will limit signal propagation distance and distort signals, and it will create an impedance deviation that can be seen in TDR measurements. In this article, we'll look at the balance between copper foil losses and other types of losses in a PCB, as well as some strategies that are commonly used to overcome roughness.
We are happy to announce that the Altium Designer 22.8 update is now available. Altium Designer 22.8 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
In this article, we’ll look at beamforming implementation in an advanced method combining analog and digital techniques, known as hybrid beamforming. This method blends both digital and analog techniques to create multiple beams and thus reach multiple users with varying intensities. In the case of an RF imaging system or a radar system, hybrid beamforming in a MIMO technique also allows tracking of multiple targets with adjustable resolution.
The problem with every via impedance calculator that I have seen is simple: they are incomplete or totally wrong. The “incomplete” part refers to a lack of context; these calculators can roughly reproduce a well-known estimate from a legend like Howard Johnson in his Digital Design textbooks. However, these calculators never provide insight into what they are actually calculating, or where the calculated via impedance is accurate. Keep reading to see why these calculators get it so wrong, as well as the context surrounding via impedance.
When designing high power circuits (usually very high voltage and/or current), you’ll need to create a regulator from scratch and place it in your PCB layout. It's also the case that you may want to model a real component using discretes in a simulation in order to qualify the system's expected operating regime. As part of buck converter design, you can easily run a buck converter simulation directly in Altium Designer’s schematic editor. Here’s how you can access these features in the newest version of Altium Designer.
Just as you get used to PCIe 5.0, they decide to release another standard! The newest iteration of PCIe is Gen6, or PCIe 6.0. PCIe 6.0 brings a doubling of channel bandwidth through introduction of PAM-4 as the signaling method in high-speed differential channels. This signaling method is a first for PCIe, and it’s an important enabler of the doubled data rate we see in the current standard. In this article, I’ll run over the important points in the standard and what PCB designers can expect when designing these channels.
One of the common implementations of SPI and I2C in a PCB layout is as a protocol for reading and writing to an external Flash memory. Flash chips are a very common component in embedded systems and can offer high capacities of non-volatile memory up to Gb values. When choosing a memory chip, you'll want to match the application requirements and functionality with the bus speed you need for read and write operations in your memory chip. There is also the matter of the type of Flash memory you'll need to access (NOR vs. NAND).
There is no SPI trace impedance requirement? The reality is that SPI lines only start to need impedance control when the length of the interconnect becomes very long. And because there is no specific impedance requirement in the bus, you have some freedom in channel design and termination. So what exactly qualifies as “very long” and when is some termination method needed? We’ll break it down in this article.
During this year's AltiumLive CONNECT event, I recall receiving an interesting question about the skin effect and the distribution of current due to the presence of ground in coplanar transmission lines. In this article, we'll look at the electric field around a transmission line carrying a signal, and how this might be impacted by the skin effect.
When you get your PCBA back from an assembler, you’ll notice the packaging materials used to pack and ship the PCBA. Those materials are specific to electronics, and if you build products on behalf of clients, it’s important to know the packaging materials used for packing and shipping electronics. In this article I’ll show the main set of materials and equipment used to package electronics assemblies.
Once you've got your PCB layout finished and you're ready to start preparing for manufacturing, one of the critical steps is to create PCB Gerber files. When you're ready to create your Gerber files, you need the right set of CAM processor tools that can take data from your PCB layout. In this article, we'll guide you through this process of how to make PCB Gerber files and show some example tasks you might need to perform to generate them.
One of the major factors impacting reliability of a PCBA is the use of teardrops on traces in the PCB. Like many aspects of reliability, the considerations also span into the signal integrity domain, particularly as more high-reliability products require greater data handling capabilities and run at higher speeds. In this article, I’ll break down the issues present in teardrop usage on differential pairs and how these may affect impedance.