News & Updates
During the recent IPC APEX expo, there was a lot of discussion about SAP, or semi-additive PCB processes. As with any new technology adoption there were people that are excited to jump right in and start designing with much finer feature sizes and work through the inevitable changes to the traditional thought process. Others are in a "let’s wait and see" mode and of course there are a few skeptics there as well, so keep reading to learn more.
Parasitic extraction: the integrated circuit design community must grapple with this task on a daily basis, especially once gate features are reduced below ~350 nm and chips run at high switching speeds. The PCB community also has to deal with this idea in order to better design power delivery networks, interconnects with precise impedance, and properly quantify crosstalk and coupling mechanisms.
Most designers don’t realize they need to worry about power integrity until they have a power integrity problem. Other designers might build boards that can’t handle the demands of modern digital and high frequency components, and they may not realize the problems that lurk in their power delivery network (PDN). Although the basic concepts involved in designing for power integrity are well-known, myths about power integrity abound, and designers need tools to help them evaluate and qualify power integrity in a PDN.
The use of ferrites in a PDN is one design recommendation that is fraught with unclear guidance and over-generalized recommendations. If you see an application note or a reference design that recommends placing a ferrite in a PDN, should you follow this in your specific design, or should you ignore this and focus on adding capacitance?
When you’re done creating a new board, it’s time to send your design data to the manufacturer. Before releasing your designs, you’ll want to make sure that everything is ready and works as intended. In this informative webinar, we’ll review some of the must-have checks before sending your output data for fabrication.
Before your board can be put into production and prepared for assembly, you have to generate a set of files that assist your manufacturer. These are your PCB design output files, also known as manufacturing files, fabrication data, assembly files, and a host of other names. Before you send your design file off to a manufacturer in an email, make sure to get a list of their required fabrication and assembly files first. If you’re a new designer, take some time to read over the basic PCB manufacturing file extensions below.
Transformers can provide very effective signal isolation and are used to manipulate AC voltage and current levels. They can achieve all this with a greater than 95% power efficiency, which is why we commonly see them used in bench power supplies, audio gear, computers, kitchen appliances, and wall-warts. However, transformer theory can be unintuitive and in this article we answer on questions about them
There are all sorts of version control systems (VCS) out there that people have been using with their PCB design software. As discussed in Why Use a Version Control System, we looked at different options ranging for local hard drive storage to sophisticated online revisioning systems. In this article we will be reviewing the differences between a standard VCS and Altium 365.
Controlled impedance routing at high frequencies is difficult enough, and it's important to make sure that you stay within your loss budget on long routes or in lossy media. When you have to route a long trace or a long differential pair to a connector or another component, what can you do if you're reaching the end of your loss budget? In this article, we’ll take a look at the skip reference routing method and explain how it can help recover some loss budget in a lossy interconnect.
What most people don’t seem to grasp is that every aspect of the PCB is critical. It all plays a significant part in the operation of the final product. The layer stack is no different. We need to keep in mind materials and the intricacies therein, including thickness, weave, dielectric constants, and more. A proper layer stack is needed for each and every design, so it's important to know how to navigate the layer stack manager and all of its features.
We are pleased to announce that Altium 365 is officially SOC 2 Type 1 certified. System and Organization Controls (SOC) 2 is a widely recognized attestation of security compliance defined by the AICPA and is considered the standard for ensuring data security and operational maturity. A SOC 2 certification provides valuable information for companies to assess the quality of the security provided by a service such as Altium 365.
It’s no secret that component shortages have become more frequent this year. In fact, countries around the world are losing billions in revenue due to supply issues. Having the right components on hand is more crucial than ever as availability, obsolescence, counterfeit products and environmental non-compliance risks continue to grow. Fortunately, many shortages can be avoided by introducing proactive supply chain practices.
Do length-tuning structures create an impedance discontinuity? The answer is an unequivocal “yes”, but it might not matter in your design depending on several factors. Applying a length-tuning structure is equivalent to changing the distance between the traces while meandering. Therefore, you will have a change in the odd-mode impedance of a single trace. The question then becomes: does this deviation in trace impedance in a length tuning structure matter?
The continued miniaturization of both packaging and component size in next-generation electronics is becoming harder and harder to work around and presents a significant challenge for both PCB designers and PCB fabricators. To effectively navigate the constraints of the traditional subtractive-etch PCB fabrication processes, PCB designs require advanced PCB fabrication capabilities while pushing the limits of finer feature size, higher layer counts, multiple levels of stacked micro vias and increased lamination cycles.
Take a look at the inside of some integrated circuit packages, and you’ll find a number of wires bonded to the semiconductor die and the pads at the edge of the component's package. As a signal traverses makes its way along an interconnect and into a destination circuit, signals need to travel across these bond wires and pads before they are interpreted as a logic state. As you look around the edge of an IC, these bond wires can have different lengths, and they incur different levels of delay and contribute to total jitter.
Once you’ve run out of room on your 4-layer PCB, it’s time to graduate to a 6-layer board. The additional layer can give you room for more signals, an additional plane pair, or a mix of conductors. How you use these extra layers is less important than how you arrange them in the PCB stackup, as well as how you route on a 6-layer PCB. If you’ve never used a 6-layer board before, or you’ve had EMI troubles with this stackup that are difficult to solve, keep reading to see some 6-layer PCB design guidelines and best practices.
We are happy to announce that the Altium Designer 22.5 update is now available. Altium Designer 22.5 continues to focus on improving the user experience, as well as performance and stability of the software, based on feedback from our users. Check out the key new features in the What's New section on the left side of this window!
PCB stackups often incorporate slightly dissimilar materials that could pose a reliability problem. Hybrid PCBs are one case where the PCB stackup will include different materials, typically a standard FR4 laminate and a PTFE laminate for RF PCBs. Designers who want to take the lead on material selection when designing their hybrid stackups should consider these factors that affect reliability. As with any PCB stackup, make sure you get your fabricator involved in the manufacturing process early to ensure reliability problems do not arise during production.
In a previous article about circuit simulation and reliability, I looked at how Monte Carlo analysis is commonly used to evaluate circuits that are subject to random variations in component values. Sensitivity analysis is a bit different and it tells you how the operating characteristics of your circuit change in a specific direction. Compared to a Monte Carlo simulation, sensitivity analysis gives you a convenient way to predict exactly how the operating characteristics will change if you were to deliberately increase or decrease the value of a component.
Field Programmable Gate Arrays, or FPGAs, have become ubiquitous amongst high-speed, real-time digital systems. The speed at which FPGAs operate continues to increase at a dizzying pace but their adoption into Continuous Integration pipelines seems not to trail as closely. In this article we will review the concept of CI pipelines, their application to FPGAs, and look at examples on how to set this up.
Conflicts can occur when multiple people work on the same project simultaneously. The user might not realize that they are not looking at the latest version of the documentation, leading to problems later. To address this issue, Altium features an intuitive graphical user interface that allows you to examine conflicts quickly and carefully
Anytime you place a component in your PCB, it’s almost like you’re gambling. All components have tolerances, and some of these are very precise, but others components can have very wide tolerances on their nominal values. In the event the tolerances on these components become too large, how can you predict how these tolerances will affect your circuits?
If you look in datasheets for most components, you’ll often find a recommended land pattern, usually alongside some mechanical package information and assembly information. This is not always the case with BGA components, especially components with high ball count. There are a few reasons for this that we can speculate: those ball counts might just be too big to put into a single page, or the manufacturer just expects you to know how to create that land pattern.
Molded interconnect devices are essentially plastic molded substrates with traces running along any surface, including at right angles and running vertically. Altium users can use the new 3D Routing extension to design their own component carriers, which can be mounted vertically in a standard assembly process. If you’ve always wanted to vertically mount components or entire circuits, but without the expense of adding a flex section to your design, the new 3D Routing extension with HARTING’s component carrier designs provides a unique solution.
Altium has released version 2.9.0 of the MCAD CoDesigner. This version has the option to exclude small components when transferring from ECAD to MCAD. The arc behavior was improved, and the support for splines in board shape and cutouts was added. With this release, you can now select a specific SOLIDWORKS configuration of a part to use on the board and view the improvements made for Siemens NX.
Altium Designer's world-class PCB design features help users quickly get started with new rigid-flex designs and prepare them for manufacturing. Rigid-flex in Altium Designer starts with designing a manufacturable PCB layer stack complete with via transitions and any calculated impedance requirements. Keep reading to see how Altium Designer supports your flex and rigid-flex designs.
Like any other advanced PCB, success in HDI design comes from designing the right stackup. One common HDI stackup used to support routing into moderate pin count, high-density BGA components is the 2+N+2 PCB layer stack for HDI boards. We’ll explore this stackup more in this article, as well as how it is related to other advanced stackups used in HDI PCBs.