News & Updates
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Just as you get used to PCIe 5.0, they decide to release another standard! The newest iteration of PCIe is Gen6, or PCIe 6.0. PCIe 6.0 brings a doubling of channel bandwidth through introduction of PAM-4 as the signaling method in high-speed differential channels. This signaling method is a first for PCIe, and it’s an important enabler of the doubled data rate we see in the current standard. In this article, I’ll run over the important points in the standard and what PCB designers can expect when designing these channels.
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One of the common implementations of SPI and I2C in a PCB layout is as a protocol for reading and writing to an external Flash memory. Flash chips are a very common component in embedded systems and can offer high capacities of non-volatile memory up to Gb values. When choosing a memory chip, you'll want to match the application requirements and functionality with the bus speed you need for read and write operations in your memory chip. There is also the matter of the type of Flash memory you'll need to access (NOR vs. NAND).
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Being able to design a board in your ECAD environment doesn’t mean that it is manufacturable in real life. You have to make sure your CAD representation won’t have any problems in the real world by taking some precautions. For example, there are certain areas that need to be free of components and have specified clearances like your board edge. This webinar will help you get acquainted with the creation and modification of your board shape so that you can ensure manufacturability.
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There is no SPI trace impedance requirement? The reality is that SPI lines only start to need impedance control when the length of the interconnect becomes very long. And because there is no specific impedance requirement in the bus, you have some freedom in channel design and termination. So what exactly qualifies as “very long” and when is some termination method needed? We’ll break it down in this article.
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During this year's AltiumLive CONNECT event, I recall receiving an interesting question about the skin effect and the distribution of current due to the presence of ground in coplanar transmission lines. In this article, we'll look at the electric field around a transmission line carrying a signal, and how this might be impacted by the skin effect.
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When you get your PCBA back from an assembler, you’ll notice the packaging materials used to pack and ship the PCBA. Those materials are specific to electronics, and if you build products on behalf of clients, it’s important to know the packaging materials used for packing and shipping electronics. In this article I’ll show the main set of materials and equipment used to package electronics assemblies.
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Once you've got your PCB layout finished and you're ready to start preparing for manufacturing, one of the critical steps is to create PCB Gerber files. When you're ready to create your Gerber files, you need the right set of CAM processor tools that can take data from your PCB layout. In this article, we'll guide you through this process of how to make PCB Gerber files and show some example tasks you might need to perform to generate them.
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There are many aspects to designing a PCB. One of the larger aspects has to do with managing your components. We all need components for our designs, but are those components in our library and designs up-to-date or even purchasable? These questions need to be answered before we can safely use them. Altium Designer® has several tools to help you manage the components in your libraries and designs.
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One of the major factors impacting reliability of a PCBA is the use of teardrops on traces in the PCB. Like many aspects of reliability, the considerations also span into the signal integrity domain, particularly as more high-reliability products require greater data handling capabilities and run at higher speeds. In this article, I’ll break down the issues present in teardrop usage on differential pairs and how these may affect impedance.
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High-reliability electronics must go through multiple rounds of testing and qualification to ensure they can withstand their intended operating environment. Designing to performance standards, whether the baseline IPC standards or more stringent industry standards, is the first step in ensuring a reliable circuit board. In this e-book, readers will gain a thorough look into PCB testing and analysis, starting from basic tests performed on bare boards and completed assemblies.
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There are some guidelines I see many designers implement as a standard practice, often without thinking about it. Some of these practices are misunderstood or implemented without best practices. Others are implemented without thinking about the potential problems. One of these is the use of tented vias, which is sometimes implemented in a PCB layout by default. Is this always the right practice?
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The idea of a purely capacitive load is something of a fallacy. Yes, capacitors exist, but all capacitors are non-ideal, and it is this deviation from a theoretical capacitance that determines how to impedance match a load that exhibits capacitive behavior. Let’s take a look at this important aspect of interconnect design and see what it really means to terminate a capacitive load.
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There are all sorts of version control systems out there that people have been using with their PCB design software. As discussed in Why Use a Version Control System, we looked at different options ranging for local hard drive storage to sophisticated online revisioning systems. In this article we will be reviewing the differences between a standard VCS and Altium 365.
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Version Control Systems (VCS) have been around for many decades within the software world but can be surprisingly new to some folks in the electronics design industry. This article will cover what a VCS is, what it does, and why you should be using one for your PCB design projects.
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Designers often conflate leftover annular ring and pad sizes - they need to place a sufficiently large pad size on the surface layer to ensure that the annular ring that is leftover during fabrication will be large enough. As long as the annular ring is sufficiently large, the drill hit will not be considered defective and the board will have passed inspection. In this article, I'll discuss the limits on IPC-6012 Class 3 annular rings as these are a standard fabrication requirement for high-reliability rigid PCBs.
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Sending a board out for fabrication is an exciting and nerve-wracking moment. Why not just give your fabricator your design files and let them figure it out? There are a few reasons for this, but it means the responsibility comes back to you as the designer to produce manufacturing files and documentation for your PCB. It’s actually quite simple if you have the right design tools. We’ll look at how you can do this inside your PCB layout and how this will help you quickly generate data for your manufacturer.
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As the world of technology has evolved, so has the need to pack more capabilities into smaller packages. PCBs designed using high-density interconnect techniques tend to be smaller as more components are packed in a smaller space. An HDI PCB uses blind, buried, and micro vias, vias in pads, and very thin traces to pack more components into a smaller area. We’ll show you the design basics for HDI and how Altium Designer® can help you create a powerful HDI PCB.
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Test points in your electronic assembly will give you a location to access components and take important measurements to verify functionality. If you’ve never used a test point or you’re not sure if you need test points, keep reading to see what options you have for test point usage in your PCB layout.
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The concept and implementation of differential impedance are both sometimes misunderstood. In addition, the design of a channel to reach a specific differential impedance is often done in a haphazard way. The very concept of differential impedance is something of a mathematical construct that doesn’t fully capture the behavior of each signal in a differential trace. Keep reading to see a bit more depth on how to design to a differential impedance spec and exactly what it means for your design.
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Quite often, a standard assembly drawing is not enough to ensure the quality of a PCB assembly, especially when designing high-density boards. It would also be helpful to include additional detailing for simpler devices. The use of a Draftsman document brings an elegant, yet powerful solution to make these tasks easier.
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An effective product lifecycle management (PLM) solution will integrate the tools and processes employed to design, develop and manufacture a new device. This solution goes beyond engineering activities to include the project management, process control, and financial management of the end-to-end business processes. PLM solutions create this collaborative environment where product development can flourish, bringing additional benefits in efficiencies and transparent communications, breaking silos, and speeding up the development process.
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In this article, we want to get closer to a realistic description of tight coupling vs. loose coupling in terms of differential pair spacing, as well as how the differential pair spacing affects things like impedance, differential-mode noise, reception of common-mode noise, and termination. As we’ll see, the focus on tight coupling has its merits, but it’s often cited as necessary for the wrong reasons.
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You’ve possibly gone through plenty of engineering design reviews, both on the front-end of a project and the back-end before manufacturing. Engineering design reviews are performed to accomplish multiple objectives, and with many engineering teams taking a systems-based approach to design and production, electronics design teams will need to review much more than just a PCB layout and BOM. Today’s challenges with sourcing, manufacturability, reliability, and mechanical constraints are all areas that must be confronted in real designs
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One of the most common points of failure of a device occurs even before you start to layout your circuit board. Mistakes in your schematic design can easily make their way all the way into prototypes or production without a second thought once layout starts. In this article, I’m not going to extol the virtues of a good schematic design. Instead, this article is a simple no frills checklist.
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One common question from designers is current-carrying capacity of conductors in a PCB. Trace and via current-carrying capacity are legitimate design points to focus on when designing a new board that will carry high current. The goal is to keep conductor temperatures below some appropriate limit, which then helps keep components on the board cool. Let’s dig into the current state of thermal demands on vias in PCBs and how they compare to internal and external PCB traces.
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A combination of good printed circuit board design and good shielding mitigates EMI. Good PCB design for EMI shielding revolves around the layout, the placement of filters, and ground planes. A well-designed PCB minimizes parasitic capacitance and ground loops. Keep reading to learn more about PCB shielding.